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Searched refs:SI32_EMIFIF_A_CONFIG_WDHINH_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_silabs-latest/si32/si32Hal/SI32_Modules/
DSI32_EMIFIF_A_Type.h243 (basePointer->CONFIG_CLR = SI32_EMIFIF_A_CONFIG_WDHINH_MASK)
256 (basePointer->CONFIG_SET = SI32_EMIFIF_A_CONFIG_WDHINH_MASK)
DSI32_EMIFIF_A_Type.c202 basePointer->CONFIG_CLR = SI32_EMIFIF_A_CONFIG_WDHINH_MASK; in _SI32_EMIFIF_A_enable_write_data_hold()
215 basePointer->CONFIG_SET = SI32_EMIFIF_A_CONFIG_WDHINH_MASK; in _SI32_EMIFIF_A_disable_write_data_hold()
DSI32_EMIFIF_A_Registers.h110 #define SI32_EMIFIF_A_CONFIG_WDHINH_MASK 0x00000100 macro