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Searched refs:DMEM_NUM_BANKS (Results 1 – 25 of 96) sorted by relevance

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/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22c224f512gn32.h966 #define DMEM_NUM_BANKS 0x2UL /**> Number of Banks */ macro
Defr32bg22c224f512im32.h966 #define DMEM_NUM_BANKS 0x2UL /**> Number of Banks */ macro
Defr32bg22e224f512im40.h980 #define DMEM_NUM_BANKS 0x2UL /**> Number of Banks */ macro
Defr32bg22c112f352gm32.h964 #define DMEM_NUM_BANKS 0x2UL /**> Number of Banks */ macro
Defr32bg22c224f512im40.h980 #define DMEM_NUM_BANKS 0x2UL /**> Number of Banks */ macro
Defr32bg22e224f512im32.h966 #define DMEM_NUM_BANKS 0x2UL /**> Number of Banks */ macro
Defr32bg22c112f352gm40.h978 #define DMEM_NUM_BANKS 0x2UL /**> Number of Banks */ macro
Defr32bg22c222f352gm32.h966 #define DMEM_NUM_BANKS 0x2UL /**> Number of Banks */ macro
Defr32bg22c222f352gm40.h980 #define DMEM_NUM_BANKS 0x2UL /**> Number of Banks */ macro
Defr32bg22c222f352gn32.h966 #define DMEM_NUM_BANKS 0x2UL /**> Number of Banks */ macro
Defr32bg22c224f512gm32.h966 #define DMEM_NUM_BANKS 0x2UL /**> Number of Banks */ macro
Defr32bg22c224f512gm40.h980 #define DMEM_NUM_BANKS 0x2UL /**> Number of Banks */ macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32FG23/Include/
Defr32fg23b020f128gm40.h1090 #define DMEM_NUM_BANKS 0x4UL /**> Number of physical SRAM banks */ macro
Defr32fg23b020f512im40.h1090 #define DMEM_NUM_BANKS 0x4UL /**> Number of physical SRAM banks */ macro
Defr32fg23b021f512im40.h1087 #define DMEM_NUM_BANKS 0x4UL /**> Number of physical SRAM banks */ macro
Defr32fg23a010f128gm40.h1089 #define DMEM_NUM_BANKS 0x4UL /**> Number of physical SRAM banks */ macro
Defr32fg23a010f256gm40.h1089 #define DMEM_NUM_BANKS 0x4UL /**> Number of physical SRAM banks */ macro
Defr32fg23a010f512gm40.h1089 #define DMEM_NUM_BANKS 0x4UL /**> Number of physical SRAM banks */ macro
Defr32fg23a011f512gm40.h1086 #define DMEM_NUM_BANKS 0x4UL /**> Number of physical SRAM banks */ macro
Defr32fg23a020f128gm40.h1089 #define DMEM_NUM_BANKS 0x4UL /**> Number of physical SRAM banks */ macro
Defr32fg23a020f256gm40.h1089 #define DMEM_NUM_BANKS 0x4UL /**> Number of physical SRAM banks */ macro
Defr32fg23a020f512gm40.h1089 #define DMEM_NUM_BANKS 0x4UL /**> Number of physical SRAM banks */ macro
Defr32fg23a021f512gm40.h1086 #define DMEM_NUM_BANKS 0x4UL /**> Number of physical SRAM banks */ macro
Defr32fg23b010f128gm40.h1090 #define DMEM_NUM_BANKS 0x4UL /**> Number of physical SRAM banks */ macro
Defr32fg23b010f512im40.h1090 #define DMEM_NUM_BANKS 0x4UL /**> Number of physical SRAM banks */ macro

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