Home
last modified time | relevance | path

Searched refs:_SMU_PPUFS_PERIPHID_GPCRC (Results 1 – 25 of 69) sorted by relevance

123

/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_smu.h322 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
359 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_smu.h322 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
359 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_smu.h337 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
377 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_smu.h337 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
377 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_smu.h337 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
377 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_smu.h431 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
488 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b390f1024gl112.h7866 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
7921 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b390f512gl112.h7866 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
7921 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b110f1024gq64.h8633 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
8686 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b110f1024gm64.h8633 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
8686 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b110f1024iq64.h8633 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
8686 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b530f512iq64.h8669 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
8723 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b530f512il112.h8669 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
8723 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b530f512il120.h8669 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
8723 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b530f512im64.h8669 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
8723 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b110f1024im64.h8633 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
8686 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b530f512iq100.h8669 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
8723 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b530f512gq100.h8669 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
8723 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b530f512gq64.h8669 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
8723 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b310f1024gl112.h8667 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
8721 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b510f1024gl112.h8669 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
8723 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b310f1024gq100.h8667 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
8721 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b330f512gl112.h8667 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
8721 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
Defm32gg12b130f512gq64.h8633 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000010UL /**< Mode GPCRC for… macro
8686 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_smu.h473 #define _SMU_PPUFS_PERIPHID_GPCRC 0x00000012UL /**< Mode GPCRC for… macro
538 #define SMU_PPUFS_PERIPHID_GPCRC (_SMU_PPUFS_PERIPHID_GPCRC << 0) /**< Shifted mode G…

123