/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/ |
D | efm32gg12b_smu.h | 420 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 477 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b390f1024gl112.h | 7855 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 7910 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b390f512gl112.h | 7855 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 7910 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b110f1024gq64.h | 8622 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8675 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b110f1024gm64.h | 8622 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8675 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b110f1024iq64.h | 8622 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8675 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b530f512iq64.h | 8658 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8712 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b530f512il112.h | 8658 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8712 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b530f512il120.h | 8658 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8712 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b530f512im64.h | 8658 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8712 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b110f1024im64.h | 8622 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8675 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b530f512iq100.h | 8658 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8712 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b530f512gq100.h | 8658 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8712 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b530f512gq64.h | 8658 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8712 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b310f1024gl112.h | 8656 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8710 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b510f1024gl112.h | 8658 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8712 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b310f1024gq100.h | 8656 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8710 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b330f512gl112.h | 8656 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8710 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b130f512gq64.h | 8622 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8675 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b330f512gq100.h | 8656 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8710 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b130f512im64.h | 8622 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8675 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b130f512gm64.h | 8622 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8675 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b130f512iq64.h | 8622 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8675 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
D | efm32gg12b510f1024gl120.h | 8658 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000005UL /**< Mode CAN0 for … macro 8712 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/ |
D | efm32gg11b_smu.h | 461 #define _SMU_PPUFS_PERIPHID_CAN0 0x00000006UL /**< Mode CAN0 for … macro 526 #define SMU_PPUFS_PERIPHID_CAN0 (_SMU_PPUFS_PERIPHID_CAN0 << 0) /**< Shifted mode C…
|