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Searched refs:_EMU_VMONAVDDCTRL_MASK (Results 1 – 25 of 71) sorted by relevance

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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_emu.h932 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_emu.h932 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_emu.h1025 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_emu.h1008 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_emu.h1008 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_emu.h1025 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_emu.h1025 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_emu.h1144 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_emu.h1136 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
Defm32gg12b390f1024gl112.h3212 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
Defm32gg12b390f512gl112.h3212 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
Defm32gg12b110f1024gq64.h4043 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
Defm32gg12b110f1024gm64.h4043 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
Defm32gg12b110f1024iq64.h4043 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
Defm32gg12b530f512iq64.h4051 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
Defm32gg12b530f512il112.h4051 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
Defm32gg12b530f512il120.h4051 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
Defm32gg12b530f512im64.h4051 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
Defm32gg12b110f1024im64.h4043 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
Defm32gg12b530f512iq100.h4051 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
Defm32gg12b530f512gq100.h4051 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
Defm32gg12b530f512gq64.h4051 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
Defm32gg12b310f1024gl112.h4049 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
Defm32gg12b510f1024gl112.h4051 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro
Defm32gg12b310f1024gq100.h4049 #define _EMU_VMONAVDDCTRL_MASK 0x00FFFF0DUL … macro

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