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Searched refs:_EMU_IFS_R5VVSINT_MASK (Results 1 – 25 of 64) sorted by relevance

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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_emu.h597 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_emu.h589 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b390f1024gl112.h2665 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b390f512gl112.h2665 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b110f1024gq64.h3496 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b110f1024gm64.h3496 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b110f1024iq64.h3496 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b530f512iq64.h3504 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b530f512il112.h3504 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b530f512il120.h3504 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b530f512im64.h3504 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b110f1024im64.h3496 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b530f512iq100.h3504 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b530f512gq100.h3504 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b530f512gq64.h3504 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b310f1024gl112.h3502 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b510f1024gl112.h3504 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b310f1024gq100.h3502 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b330f512gl112.h3502 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b130f512gq64.h3496 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b330f512gq100.h3502 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b130f512im64.h3496 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b130f512gm64.h3496 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b130f512iq64.h3496 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro
Defm32gg12b510f1024gl120.h3504 #define _EMU_IFS_R5VVSINT_MASK 0x800000UL … macro

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