_CMU_HFXOCTRL1_PEAKDETTHR_THR7 (reference) in projects: hal_silabs-3.7.0

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Searched refs:_CMU_HFXOCTRL1_PEAKDETTHR_THR7 (Results 1 – 25 of 64) sorted by relevance

12 3

/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
D	efm32gg12b_cmu.h	`522 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 531 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b390f1024gl112.h	`4358 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 4367 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b390f512gl112.h	`4358 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 4367 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b110f1024gq64.h	`5189 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5198 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b110f1024gm64.h	`5189 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5198 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b110f1024iq64.h	`5189 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5198 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b530f512iq64.h	`5197 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5206 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b530f512il112.h	`5197 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5206 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b530f512il120.h	`5197 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5206 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b530f512im64.h	`5197 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5206 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b110f1024im64.h	`5189 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5198 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b530f512iq100.h	`5197 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5206 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b530f512gq100.h	`5197 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5206 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b530f512gq64.h	`5197 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5206 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b310f1024gl112.h	`5195 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5204 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b510f1024gl112.h	`5197 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5206 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b310f1024gq100.h	`5195 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5204 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b330f512gl112.h	`5195 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5204 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b130f512gq64.h	`5189 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5198 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b330f512gq100.h	`5195 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5204 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b130f512im64.h	`5189 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5198 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b130f512gm64.h	`5189 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5198 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b130f512iq64.h	`5189 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5198 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
D	efm32gg12b510f1024gl120.h	`5197 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 5206 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
D	efm32gg11b_cmu.h	`522 #define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL … macro 531 #define CMU_HFXOCTRL1_PEAKDETTHR_THR7 (_CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12) …`

12 3

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
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babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
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