/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG22/Include/ |
D | efr32bg22c222f352gm32.h | 508 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 733 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 828 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_…
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D | efr32bg22c222f352gm40.h | 522 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 747 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 842 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_…
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D | efr32bg22c224f512gm32.h | 508 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 733 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 828 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_…
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D | efr32bg22c224f512gm40.h | 522 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 747 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 842 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_…
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D | efr32bg22c224f512gn32.h | 508 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 733 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 828 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_…
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D | efr32bg22c224f512im32.h | 508 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 733 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 828 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_…
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D | efr32bg22c224f512im40.h | 522 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 747 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 842 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_…
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D | efr32bg22c112f352gm32.h | 506 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 731 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 826 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_…
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D | efr32bg22c112f352gm40.h | 520 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 745 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 840 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_…
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D | efr32bg22c222f352gn32.h | 508 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 733 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 828 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_…
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG27/Include/ |
D | efr32bg27c230f768im32.h | 561 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 796 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 888 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_S_CFGNS base…
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D | efr32bg27c230f768im40.h | 581 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 816 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 908 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_S_CFGNS base…
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D | efr32bg27c320f768gj39.h | 567 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 802 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 894 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_S_CFGNS base…
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D | efr32bg27c140f768im32.h | 566 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 801 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 893 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_S_CFGNS base…
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D | efr32bg27c140f768im40.h | 582 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 817 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 909 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_S_CFGNS base…
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG24/Include/ |
D | efr32mg24a020f1536gm40.h | 553 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 804 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 922 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_S_CFGNS b…
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D | efr32mg24a020f1536gm48.h | 555 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 806 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 924 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_S_CFGNS b…
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D | efr32mg24a020f1536im40.h | 553 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 804 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 922 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_S_CFGNS b…
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D | efr32mg24a020f1536im48.h | 555 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 806 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 924 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_S_CFGNS b…
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D | efr32mg24a020f768im40.h | 553 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 804 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 922 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_S_CFGNS b…
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D | efr32mg24a021f1024im40.h | 550 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 801 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 919 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_S_CFGNS b…
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D | efr32mg24a110f1536gm48.h | 553 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 804 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 922 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_S_CFGNS b…
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D | efr32mg24a121f1536gm48.h | 550 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 801 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 919 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_S_CFGNS b…
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D | efr32mg24a410f1536im40.h | 555 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 806 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 924 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_S_CFGNS b…
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D | efr32mg24a420f1536im40.h | 553 #define SMU_S_CFGNS_BASE (0x4400C000UL) /* SMU_S_CFGNS base address */ macro 804 #define SMU_CFGNS_BASE (SMU_S_CFGNS_BASE) /* SMU_CFGNS base address */ 922 #define SMU_S_CFGNS ((SMU_CFGNS_TypeDef *) SMU_S_CFGNS_BASE) /**< SMU_S_CFGNS b…
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