Home
last modified time | relevance | path

Searched refs:HFRCO0 (Results 1 – 25 of 75) sorted by relevance

123

/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG22/Source/
Dsystem_efr32bg22.c240 switch ((HFRCO0->CAL & _HFRCO_CAL_FREQRANGE_MASK) in SystemHFRCODPLLClockGet()
243 switch (HFRCO0->CAL & _HFRCO_CAL_CLKDIV_MASK) { in SystemHFRCODPLLClockGet()
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG27/Source/
Dsystem_efr32bg27.c242 switch ((HFRCO0->CAL & _HFRCO_CAL_FREQRANGE_MASK) in SystemHFRCODPLLClockGet()
245 switch (HFRCO0->CAL & _HFRCO_CAL_CLKDIV_MASK) { in SystemHFRCODPLLClockGet()
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG21/Source/
Dsystem_efr32mg21.c214 switch ((HFRCO0->CAL & _HFRCO_CAL_FREQRANGE_MASK) in SystemHFRCODPLLClockGet()
217 switch (HFRCO0->CAL & _HFRCO_CAL_CLKDIV_MASK) { in SystemHFRCODPLLClockGet()
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG24/Source/
Dsystem_efr32mg24.c242 switch ((HFRCO0->CAL & _HFRCO_CAL_FREQRANGE_MASK) in SystemHFRCODPLLClockGet()
245 switch (HFRCO0->CAL & _HFRCO_CAL_CLKDIV_MASK) { in SystemHFRCODPLLClockGet()
/hal_silabs-3.7.0/gecko/emlib/src/
Dem_cmu.c2556 while (HFRCO0->STATUS & (HFRCO_STATUS_SYNCBUSY | HFRCO_STATUS_FREQBSY)) { in CMU_HFRCODPLLBandSet()
2566 hfrcoCalCurrent = HFRCO0->CAL; in CMU_HFRCODPLLBandSet()
2567 HFRCO0->CAL = freqCal; in CMU_HFRCODPLLBandSet()
2571 hfrcoFreqRangeActual = (HFRCO0->CAL & _HFRCO_CAL_FREQRANGE_MASK); in CMU_HFRCODPLLBandSet()
2579 HFRCO0->CAL = hfrcoCalCurrent; in CMU_HFRCODPLLBandSet()
2721 while (HFRCO0->STATUS & (HFRCO_STATUS_SYNCBUSY | HFRCO_STATUS_FREQBSY)) { in CMU_DPLLLock()
2731 hfrcoCalCurrent = HFRCO0->CAL; in CMU_DPLLLock()
2732 HFRCO0->CAL = hfrcoCalVal; in CMU_DPLLLock()
2736 hfrcoFreqRangeActual = (HFRCO0->CAL & _HFRCO_CAL_FREQRANGE_MASK); in CMU_DPLLLock()
2764 HFRCO0->CAL = hfrcoCalCurrent; in CMU_DPLLLock()
[all …]
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21a010f768im32.h868 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1188 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1191 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg21a020f1024im32.h870 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1190 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1193 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg21a020f512im32.h870 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1190 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1193 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg21a020f768im32.h870 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1190 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1193 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg21b020f768im32.h870 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1190 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1193 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Drm21z000f1024im32.h866 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1186 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1189 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg21a010f1024im32.h868 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1188 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1191 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg21a010f512im32.h868 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1188 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1191 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg21b010f512im32.h868 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1188 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1191 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg21b010f768im32.h868 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1188 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1191 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg21b010f1024im32.h868 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1188 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1191 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg21b020f1024im32.h870 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1190 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1193 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg21b020f512im32.h870 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1190 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1193 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24a020f1536gm40.h990 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1387 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1390 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg24a020f1536gm48.h992 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1389 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1392 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg24a020f1536im40.h990 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1387 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1390 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg24a020f1536im48.h992 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1389 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1392 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg24a020f768im40.h990 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1387 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1390 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg24a021f1024im40.h987 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1384 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1387 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \
Defr32mg24a110f1536gm48.h990 #define HFRCO0 ((HFRCO_TypeDef *) HFRCO0_BASE) /**< HFRCO0 base p… macro
1387 #define HFRCO(n) (((n) == 0) ? HFRCO0 \
1390 #define HFRCO_NUM(ref) (((ref) == HFRCO0) ? 0 \

123