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Searched refs:CLKDIV (Results 1 – 25 of 49) sorted by relevance

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/hal_silabs-3.7.0/gecko/emlib/src/
Dem_leuart.c223 return LEUART_BaudrateCalc(freq, leuart->CLKDIV); in LEUART_BaudrateGet()
315 leuart->CLKDIV = clkdiv; in LEUART_BaudrateSet()
487 leuart->CLKDIV = _LEUART_CLKDIV_RESETVALUE; in LEUART_Reset()
Dem_usart.c423 usart->CLKDIV = clkdiv; in USART_BaudrateAsyncSet()
613 return USART_BaudrateCalc(freq, usart->CLKDIV, syncmode, ovs); in USART_BaudrateGet()
693 usart->CLKDIV = clkdiv; in USART_BaudrateSyncSet()
1105 usart->CLKDIV = _USART_CLKDIV_RESETVALUE; in USART_Reset()
1128 usart->CLKDIV = _USART_CLKDIV_RESETVALUE; in USART_Reset()
Dem_i2c.c228 return freqHfper / ((n * (i2c->CLKDIV + 1)) + I2C_CR_MAX); in I2C_BusFreqGet()
387 i2c->CLKDIV = (uint32_t)div; in I2C_BusFreqSet()
455 i2c->CLKDIV = _I2C_CLKDIV_RESETVALUE; in I2C_Reset()
Dem_eusart.c347 eusart->CLKDIV = _EUSART_CLKDIV_RESETVALUE; in EUSART_Reset()
684 eusart->CLKDIV = clkdiv; in EUSART_BaudrateSet()
715 div = eusart->CLKDIV; in EUSART_BaudrateGet()
1375 eusart->CLKDIV = eusart->CLKDIV; in EUSART_Disable()
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_leuart.h50 __IOM uint32_t CLKDIV; /**< Clock Control Register */ member
Defm32hg_i2c.h51 __IOM uint32_t CLKDIV; /**< Clock Division Register */ member
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_leuart.h50 __IOM uint32_t CLKDIV; /**< Clock Control Register */ member
Defm32wg_i2c.h51 __IOM uint32_t CLKDIV; /**< Clock Division Register */ member
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_leuart.h51 __IOM uint32_t CLKDIV; /**< Clock Control Register */ member
Defm32gg12b_i2c.h52 __IOM uint32_t CLKDIV; /**< Clock Division Register */ member
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_leuart.h51 __IOM uint32_t CLKDIV; /**< Clock Control Register */ member
Defm32gg11b_i2c.h52 __IOM uint32_t CLKDIV; /**< Clock Division Register */ member
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_leuart.h51 __IOM uint32_t CLKDIV; /**< Clock Control Register */ member
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_leuart.h51 __IOM uint32_t CLKDIV; /**< Clock Control Register */ member
Defm32pg1b_i2c.h52 __IOM uint32_t CLKDIV; /**< Clock Division Register */ member
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_leuart.h51 __IOM uint32_t CLKDIV; /**< Clock Control Register */ member
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_i2c.h52 …__IOM uint32_t CLKDIV; /**< Clock Division Register … member
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_leuart.h51 __IOM uint32_t CLKDIV; /**< Clock Control Register */ member
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_i2c.h52 …__IOM uint32_t CLKDIV; /**< Clock Division Register … member
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_leuart.h51 __IOM uint32_t CLKDIV; /**< Clock Control Register */ member
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_i2c.h52 …__IOM uint32_t CLKDIV; /**< Clock Division Register … member
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_leuart.h51 __IOM uint32_t CLKDIV; /**< Clock Control Register */ member
Defm32pg12b_i2c.h52 __IOM uint32_t CLKDIV; /**< Clock Division Register */ member
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_leuart.h51 __IOM uint32_t CLKDIV; /**< Clock Control Register */ member
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_i2c.h52 …__IOM uint32_t CLKDIV; /**< Clock Division Register … member

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