/hal_silabs-3.7.0/gecko/emlib/src/ |
D | em_aes.c | 174 AES->KEYHA = __REV_FROM_BYTEARRAY(&key[i * 4]); in AES_CBC128() 181 AES->CTRL = AES_CTRL_KEYBUFEN | AES_CTRL_XORSTART; in AES_CBC128() 183 AES->CTRL = AES_CTRL_XORSTART; in AES_CBC128() 189 AES->DATA = __REV_FROM_BYTEARRAY(&iv[i * 4]); in AES_CBC128() 197 AES->KEYLA = __REV_FROM_BYTEARRAY(&key[i * 4]); in AES_CBC128() 203 AES->XORDATA = __REV_FROM_BYTEARRAY(&in[i * 4]); in AES_CBC128() 208 while (AES->STATUS & AES_STATUS_RUNNING) in AES_CBC128() 213 __REV_TO_BYTEARRAY(&out[i * 4], AES->DATA); in AES_CBC128() 220 AES->CTRL = AES_CTRL_DECRYPT | AES_CTRL_KEYBUFEN | AES_CTRL_DATASTART; in AES_CBC128() 222 AES->CTRL = AES_CTRL_DECRYPT | AES_CTRL_DATASTART; in AES_CBC128() [all …]
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/hal_silabs-3.7.0/gecko/emlib/inc/ |
D | em_aes.h | 196 AES->IFC = flags; in AES_IntClear() 209 AES->IEN &= ~(flags); in AES_IntDisable() 227 AES->IEN |= flags; in AES_IntEnable() 243 return AES->IF; in AES_IntGet() 264 ien = AES->IEN; in AES_IntGetEnabled() 265 return AES->IF & ien; in AES_IntGetEnabled() 278 AES->IFS = flags; in AES_IntSet()
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32HG/Include/ |
D | efm32hg309f32.h | 320 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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D | efm32hg309f64.h | 320 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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D | efm32hg310f32.h | 320 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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D | efm32hg310f64.h | 320 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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D | efm32hg322f32.h | 320 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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D | efm32hg322f64.h | 320 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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D | efm32hg350f32.h | 320 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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D | efm32hg350f64.h | 320 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32WG/Include/ |
D | efm32wg900f256.h | 393 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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D | efm32wg980f128.h | 393 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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D | efm32wg980f256.h | 393 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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D | efm32wg980f64.h | 393 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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D | efm32wg990f128.h | 393 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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D | efm32wg990f64.h | 393 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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D | efm32wg995f128.h | 393 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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D | efm32wg995f256.h | 393 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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D | efm32wg995f64.h | 393 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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D | efm32wg990f256.h | 393 #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ macro
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32HG/Source/ARM/ |
D | startup_efm32hg.s | 114 DCD AES_IRQHandler ; 16: AES Interrupt
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32HG/Source/IAR/ |
D | startup_efm32hg.s | 108 DCD AES_IRQHandler ; 16: AES Interrupt
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32WG/Source/ARM/ |
D | startup_efm32wg.s | 134 DCD AES_IRQHandler ; 36: AES Interrupt
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32WG/Source/IAR/ |
D | startup_efm32wg.s | 128 DCD AES_IRQHandler ; 36: AES Interrupt
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG21/Source/IAR/ |
D | startup_efr32mg21.s | 140 DCD AES_IRQHandler ; 49: AES Interrupt
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