| /hal_silabs-3.6.0/gecko/emlib/src/ |
| D | em_emu.c | 1502 if ((EMU->PWRCTRL & _EMU_PWRCTRL_ANASW_MASK) == EMU_PWRCTRL_ANASW_DVDD) { in EMU_EnterEM4()
1503 BUS_RegMaskedClear(&EMU->PWRCTRL, _EMU_PWRCTRL_ANASW_MASK); in EMU_EnterEM4()
2806 BUS_RegBitWrite(&EMU->PWRCTRL, in EMU_DCDCInit()
2814 EMU->PWRCTRL |= EMU_PWRCTRL_REGPWRSEL_DVDD; in EMU_DCDCInit()
2825 BUS_RegBitWrite(&EMU->PWRCTRL, in EMU_DCDCInit()
2963 EMU->PWRCTRL |= EMU_PWRCTRL_REGPWRSEL_DVDD | EMU_PWRCTRL_IMMEDIATEPWRSWITCH; in EMU_DCDCPowerOff()
2965 EMU->PWRCTRL |= EMU_PWRCTRL_REGPWRSEL_DVDD; in EMU_DCDCPowerOff()
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| D | em_cmu.c | 11272 EFM_ASSERT((EMU->PWRCTRL & EMU_PWRCTRL_REGPWRSEL_DVDD) != 0UL); in CMU_OscillatorEnable()
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| /hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32BG27/Include/ |
| D | efr32bg27_msc.h | 62 …__IOM uint32_t PWRCTRL; /**< Power control register … member
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| /hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32BG22/Include/ |
| D | efr32bg22_msc.h | 62 …__IOM uint32_t PWRCTRL; /**< Power control register … member
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| /hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32MG24/Include/ |
| D | efr32mg24_msc.h | 62 …__IOM uint32_t PWRCTRL; /**< Power control register … member
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| /hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32FG1P/Include/ |
| D | efr32fg1p_emu.h | 64 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| /hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32PG1B/Include/ |
| D | efm32pg1b_emu.h | 64 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| /hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/ |
| D | efr32mg12p_emu.h | 64 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| /hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/ |
| D | efr32bg13p_emu.h | 65 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| /hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/ |
| D | efr32fg13p_emu.h | 65 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| /hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/ |
| D | efm32pg12b_emu.h | 64 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| /hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/ |
| D | efm32jg12b_emu.h | 64 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| /hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/ |
| D | efm32gg12b_emu.h | 65 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| D | efm32gg12b390f1024gl112.h | 409 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| D | efm32gg12b390f512gl112.h | 409 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| D | efm32gg12b530f512il120.h | 455 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| D | efm32gg12b530f512im64.h | 455 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| D | efm32gg12b530f512iq100.h | 455 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| D | efm32gg12b530f512iq64.h | 455 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| D | efm32gg12b530f512gm64.h | 455 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| D | efm32gg12b530f512gq100.h | 455 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| D | efm32gg12b530f512gq64.h | 455 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| D | efm32gg12b530f512il112.h | 455 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| D | efm32gg12b110f1024gm64.h | 450 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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| /hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/ |
| D | efm32gg11b_emu.h | 65 __IOM uint32_t PWRCTRL; /**< Power Control Register */ member
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