Home
last modified time | relevance | path

Searched refs:DMEM_NS_BASE (Results 1 – 25 of 41) sorted by relevance

12

/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24a020f1024im48.h602 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
793 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
971 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a020f1536gm40.h600 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
791 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
969 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a020f1536gm48.h602 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
793 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
971 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a020f1536im40.h600 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
791 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
969 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a020f1536im48.h602 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
793 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
971 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a020f768im40.h600 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
791 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
969 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a021f1024im40.h597 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
788 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
966 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a110f1024im48.h600 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
791 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
969 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a110f1536gm48.h600 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
791 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
969 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a111f1536gm48.h599 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
790 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
968 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a120f1536gm48.h598 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
789 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
967 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a121f1536gm48.h597 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
788 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
966 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a410f1536im40.h602 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
793 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
971 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a410f1536im48.h604 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
795 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
973 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a420f1536im40.h600 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
791 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
969 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a420f1536im48.h602 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
793 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
971 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a610f1536im40.h602 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
793 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
971 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24a620f1536im40.h600 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
791 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
969 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24b010f1024im48.h605 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
796 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
974 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24b010f1536im40.h603 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
794 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
972 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24b010f1536im48.h605 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
796 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
974 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24b020f1024im48.h603 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
794 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
972 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24b020f1536im40.h601 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
792 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
970 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24b020f1536im48.h603 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
794 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
972 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …
Defr32mg24b110f1536gm48.h601 #define DMEM_NS_BASE (0x500B4000UL) /* DMEM_NS base address */ macro
792 #define DMEM_BASE (DMEM_NS_BASE) /* DMEM base address */
970 #define DMEM_NS ((MPAHBRAM_TypeDef *) DMEM_NS_BASE) /**< DMEM_NS base …

12