Home
last modified time | relevance | path

Searched refs:_RTCC_CTRL_CNTPRESC_DIV8192 (Results 1 – 10 of 10) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_rtcc.h117 #define _RTCC_CTRL_CNTPRESC_DIV8192 0x0000000DUL /**< Mode DIV81… macro
134 #define RTCC_CTRL_CNTPRESC_DIV8192 (_RTCC_CTRL_CNTPRESC_DIV8192 << 8) /**< Shifted mo…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_rtcc.h117 #define _RTCC_CTRL_CNTPRESC_DIV8192 0x0000000DUL /**< Mode DIV81… macro
134 #define RTCC_CTRL_CNTPRESC_DIV8192 (_RTCC_CTRL_CNTPRESC_DIV8192 << 8) /**< Shifted mo…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_rtcc.h117 #define _RTCC_CTRL_CNTPRESC_DIV8192 0x0000000DUL /**< Mode DIV81… macro
134 #define RTCC_CTRL_CNTPRESC_DIV8192 (_RTCC_CTRL_CNTPRESC_DIV8192 << 8) /**< Shifted mo…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_rtcc.h117 #define _RTCC_CTRL_CNTPRESC_DIV8192 0x0000000DUL /**< Mode DIV81… macro
134 #define RTCC_CTRL_CNTPRESC_DIV8192 (_RTCC_CTRL_CNTPRESC_DIV8192 << 8) /**< Shifted mo…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_rtcc.h117 #define _RTCC_CTRL_CNTPRESC_DIV8192 0x0000000DUL /**< Mode DIV81… macro
134 #define RTCC_CTRL_CNTPRESC_DIV8192 (_RTCC_CTRL_CNTPRESC_DIV8192 << 8) /**< Shifted mo…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_rtcc.h117 #define _RTCC_CTRL_CNTPRESC_DIV8192 0x0000000DUL /**< Mode DIV81… macro
134 #define RTCC_CTRL_CNTPRESC_DIV8192 (_RTCC_CTRL_CNTPRESC_DIV8192 << 8) /**< Shifted mo…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_rtcc.h117 #define _RTCC_CTRL_CNTPRESC_DIV8192 0x0000000DUL /**< Mode DIV81… macro
134 #define RTCC_CTRL_CNTPRESC_DIV8192 (_RTCC_CTRL_CNTPRESC_DIV8192 << 8) /**< Shifted mo…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_rtcc.h117 #define _RTCC_CTRL_CNTPRESC_DIV8192 0x0000000DUL /**< Mode DIV81… macro
134 #define RTCC_CTRL_CNTPRESC_DIV8192 (_RTCC_CTRL_CNTPRESC_DIV8192 << 8) /**< Shifted mo…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_rtcc.h117 #define _RTCC_CTRL_CNTPRESC_DIV8192 0x0000000DUL /**< Mode DIV81… macro
134 #define RTCC_CTRL_CNTPRESC_DIV8192 (_RTCC_CTRL_CNTPRESC_DIV8192 << 8) /**< Shifted mo…
/hal_silabs-3.5.0/gecko/emlib/inc/
Dem_rtcc.h96 rtccCntPresc_8192 = _RTCC_CTRL_CNTPRESC_DIV8192, /**< Divide clock by 8192. */