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Searched refs:_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (Results 1 – 25 of 68) sorted by relevance

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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_cmu.h228 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
239 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32hg110f32.h605 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
616 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32hg110f64.h605 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
616 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32hg210f32.h605 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
616 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32hg210f64.h605 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
616 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32hg222f32.h605 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
616 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32hg222f64.h605 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
616 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_cmu.h238 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
249 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg380f128.h639 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
650 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg380f64.h639 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
650 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg390f128.h639 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
650 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg395f256.h639 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
650 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg380f256.h639 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
650 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg390f256.h639 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
650 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg390f64.h639 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
650 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg395f128.h639 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
650 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg395f64.h639 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
650 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg880f128.h734 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
745 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg890f256.h734 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
745 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg895f128.h734 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
745 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg895f256.h734 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
745 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg895f64.h734 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
745 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg295f256.h729 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
740 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg280f128.h729 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
740 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …
Defm32wg280f256.h729 #define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL … macro
740 #define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0) …

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