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Searched refs:_CMU_AUXHFRCOCTRL_TUNING_DEFAULT (Results 1 – 25 of 148) sorted by relevance

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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_cmu.h332 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
333 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32hg110f32.h709 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
710 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32hg110f64.h709 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
710 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32hg210f32.h709 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
710 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32hg210f64.h709 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
710 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32hg222f32.h709 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
710 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32hg222f64.h709 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
710 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_cmu.h344 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
345 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32wg380f128.h745 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
746 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32wg380f64.h745 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
746 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32wg390f128.h745 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
746 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32wg395f256.h745 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
746 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32wg380f256.h745 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
746 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32wg390f256.h745 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
746 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32wg390f64.h745 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
746 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32wg395f128.h745 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
746 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32wg395f64.h745 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
746 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32wg880f128.h840 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
841 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32wg890f256.h840 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
841 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32wg895f128.h840 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
841 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
Defm32wg895f256.h840 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mo… macro
841 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) /**< Sh…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_cmu.h265 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x0000003CUL … macro
266 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_cmu.h265 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x0000003CUL … macro
266 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_cmu.h269 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x0000007FUL … macro
270 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_cmu.h269 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x0000007FUL … macro
270 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0) …

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