_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (reference) in projects: hal_silabs-3.5.0

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Searched refs:_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (Results 1 – 25 of 80) sorted by relevance

12 3 4

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG1B/Include/
D	efm32pg1b_cmu.h	`287 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 291 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG1P/Include/
D	efr32fg1p_cmu.h	`287 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 291 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
D	efm32pg12b_cmu.h	`291 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 295 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
D	efm32jg12b_cmu.h	`291 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 295 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
D	efr32mg12p_cmu.h	`291 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 295 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
D	efr32bg13p_cmu.h	`298 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 302 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
D	efr32bg13p632f512gm32.h	`2293 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 2297 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
D	efr32bg13p532f512gm48.h	`2293 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 2297 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
D	efr32bg13p632f512gm48.h	`2293 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 2297 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
D	efr32bg13p532f512gm32.h	`2293 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 2297 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
D	efr32bg13p733f512gm48.h	`2293 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 2297 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
D	efr32bg13p732f512gm32.h	`2293 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 2297 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
D	efr32bg13p632f512im48.h	`2293 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 2297 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
D	efr32bg13p732f512gm48.h	`2293 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 2297 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
D	efr32bg13p632f512im32.h	`2293 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 2297 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
D	efr32fg13p_cmu.h	`298 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 302 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
D	efm32gg12b_cmu.h	`380 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 384 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
D	efm32gg12b390f1024gl112.h	`4216 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 4220 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
D	efm32gg12b390f512gl112.h	`4216 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 4220 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
D	efm32gg12b110f1024iq64.h	`5047 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 5051 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
D	efm32gg12b510f1024gl120.h	`5055 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 5059 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
D	efm32gg12b510f1024gm64.h	`5055 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 5059 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
D	efm32gg12b510f1024gl112.h	`5055 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 5059 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
D	efm32gg12b530f512im64.h	`5055 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 5059 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
D	efm32gg11b_cmu.h	`380 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL … macro 384 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25) …`

12 3 4

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