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Searched refs:TIMER1_S_BASE (Results 1 – 21 of 21) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21a010f1024im32.h475 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
636 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
795 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base…
Defr32mg21a010f512im32.h475 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
636 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
795 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base…
Defr32mg21a010f768im32.h475 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
636 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
795 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base…
Defr32mg21a020f1024im32.h477 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
638 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
797 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base…
Defr32mg21a020f512im32.h477 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
638 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
797 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base…
Defr32mg21a020f768im32.h477 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
638 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
797 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base…
Defr32mg21b010f1024im32.h475 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
636 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
795 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base…
Defr32mg21b010f768im32.h475 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
636 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
795 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base…
Defr32mg21b020f1024im32.h477 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
638 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
797 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base…
Defr32mg21b010f512im32.h475 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
636 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
795 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base…
Defr32mg21b020f512im32.h477 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
638 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
797 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base…
Defr32mg21b020f768im32.h477 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
638 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
797 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base…
Drm21z000f1024im32.h473 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
634 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
793 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22c224f512im40.h509 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
672 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
836 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIME…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27c230f768im32.h543 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
706 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
870 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base po…
Defr32bg27c230f768im40.h563 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
726 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
890 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base po…
Defr32bg27c140f768im32.h548 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
711 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
875 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base po…
Defr32bg27c140f768im40.h564 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
727 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
891 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base po…
Defr32bg27c320f768gj39.h549 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
712 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
876 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base po…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24b310f1536im48.h542 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
721 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
925 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base…
Defr32mg24b220f1536im48.h541 #define TIMER1_S_BASE (0x4004C000UL) /* TIMER1_S base address */ macro
718 #define TIMER1_BASE (TIMER1_S_BASE) /* TIMER1 base address */
917 #define TIMER1_S ((TIMER_TypeDef *) TIMER1_S_BASE) /**< TIMER1_S base…