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Searched refs:RTCC_IF_CC0 (Results 1 – 13 of 13) sorted by relevance

/hal_silabs-3.5.0/gecko/service/sleeptimer/src/
Dsl_sleeptimer_hal_rtcc.c230 RTCC_IntClear(irq_flag & (RTCC_IF_OF | RTCC_IF_CC1 | RTCC_IF_CC0)); in RTCC_IRQHandler()
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_rtcc.h248 #define RTCC_IF_CC0 (0x1UL << 4) /**< CC Cha… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_rtcc.h248 #define RTCC_IF_CC0 (0x1UL << 4) /**< CC Cha… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_rtcc.h248 #define RTCC_IF_CC0 (0x1UL << 2) /**< CC Cha… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_rtcc.h263 #define RTCC_IF_CC0 (0x1UL << 1) /**< Channel 0 Inter… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_rtcc.h263 #define RTCC_IF_CC0 (0x1UL << 1) /**< Channel 0 Inter… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_rtcc.h263 #define RTCC_IF_CC0 (0x1UL << 1) /**< Channel 0 Inter… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_rtcc.h263 #define RTCC_IF_CC0 (0x1UL << 1) /**< Channel 0 Inter… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_rtcc.h263 #define RTCC_IF_CC0 (0x1UL << 1) /**< Channel 0 Inter… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_rtcc.h263 #define RTCC_IF_CC0 (0x1UL << 1) /**< Channel 0 Inter… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_rtcc.h263 #define RTCC_IF_CC0 (0x1UL << 1) /**< Channel 0 Inter… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_rtcc.h268 #define RTCC_IF_CC0 (0x1UL << 1) /**< Channel 0 Inter… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_rtcc.h268 #define RTCC_IF_CC0 (0x1UL << 1) /**< Channel 0 Inter… macro