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Searched refs:ICACHE0_PC_BITS (Results 1 – 21 of 21) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21a010f1024im32.h959 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Defr32mg21a010f512im32.h959 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Defr32mg21a010f768im32.h959 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Defr32mg21a020f1024im32.h961 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Defr32mg21a020f512im32.h961 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Defr32mg21a020f768im32.h961 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Defr32mg21b010f1024im32.h959 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Defr32mg21b010f768im32.h959 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Defr32mg21b020f1024im32.h961 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Defr32mg21b010f512im32.h959 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Defr32mg21b020f512im32.h961 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Defr32mg21b020f768im32.h961 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Drm21z000f1024im32.h957 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22c224f512im40.h1001 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27c230f768im32.h1037 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Defr32bg27c230f768im40.h1057 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Defr32bg27c140f768im32.h1042 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Defr32bg27c140f768im40.h1058 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Defr32bg27c320f768gj39.h1043 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24b310f1536im48.h1146 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro
Defr32mg24b220f1536im48.h1135 #define ICACHE0_PC_BITS 0x20UL /**> Performance Counter bits */ macro