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Searched refs:IADC0 (Results 1 – 24 of 24) sorted by relevance

/hal_silabs-3.5.0/gecko/emlib/src/
Dem_iadc.c57 #define IADC_REF_VALID(ref) ((ref) == IADC0)
59 #define IADC_REF_VALID(ref) (((ref) == IADC0) || ((ref) == IADC1))
81 (iadc) == IADC0 ? IADC0_SCANENTRIES \
84 (iadc) == IADC0 ? IADC0_CONFIGNUM \
87 (iadc) == IADC0 ? IADC0_FIFOENTRIES \
90 (iadc) == IADC0 ? cmuClock_IADC0 \
110 while (IADC0->EN & _IADC_EN_DISABLING_MASK) { in IADC_disable()
430 IADC0->CFG[config].SCALE &= ~_IADC_SCALE_MASK; in IADC_init()
434 IADC0->CFG[config].SCALE |= IADC_SCALE_GAIN3MSB_GAIN100; in IADC_init()
436 IADC0->CFG[config].SCALE |= IADC_SCALE_GAIN3MSB_GAIN011; in IADC_init()
[all …]
Dem_prs.c213 #if defined(IADC0) in PRS_ConvertToSyncSignal()
/hal_silabs-3.5.0/gecko/emlib/inc/
Dem_prs.h613 #if defined(IADC0)
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21a010f1024im32.h898 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base po… macro
Defr32mg21a010f512im32.h898 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base po… macro
Defr32mg21a010f768im32.h898 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base po… macro
Defr32mg21a020f1024im32.h900 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base po… macro
Defr32mg21a020f512im32.h900 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base po… macro
Defr32mg21a020f768im32.h900 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base po… macro
Defr32mg21b010f1024im32.h898 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base po… macro
Defr32mg21b010f768im32.h898 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base po… macro
Defr32mg21b020f1024im32.h900 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base po… macro
Defr32mg21b010f512im32.h898 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base po… macro
Defr32mg21b020f512im32.h900 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base po… macro
Defr32mg21b020f768im32.h900 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base po… macro
Drm21z000f1024im32.h896 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base po… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22c224f512im40.h943 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27c230f768im32.h979 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base point… macro
Defr32bg27c230f768im40.h999 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base point… macro
Defr32bg27c140f768im32.h984 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base point… macro
Defr32bg27c140f768im40.h1000 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base point… macro
Defr32bg27c320f768gj39.h985 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base point… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24b310f1536im48.h1050 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base po… macro
Defr32mg24b220f1536im48.h1040 #define IADC0 ((IADC_TypeDef *) IADC0_BASE) /**< IADC0 base po… macro