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Searched refs:HFXO0_S_BASE (Results 1 – 21 of 21) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21a010f1024im32.h461 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
566 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
781 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base …
Defr32mg21a010f512im32.h461 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
566 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
781 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base …
Defr32mg21a010f768im32.h461 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
566 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
781 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base …
Defr32mg21a020f1024im32.h463 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
568 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
783 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base …
Defr32mg21a020f512im32.h463 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
568 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
783 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base …
Defr32mg21a020f768im32.h463 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
568 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
783 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base …
Defr32mg21b010f1024im32.h461 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
566 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
781 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base …
Defr32mg21b010f768im32.h461 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
566 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
781 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base …
Defr32mg21b020f1024im32.h463 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
568 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
783 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base …
Defr32mg21b010f512im32.h461 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
566 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
781 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base …
Defr32mg21b020f512im32.h463 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
568 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
783 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base …
Defr32mg21b020f768im32.h463 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
568 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
783 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base …
Drm21z000f1024im32.h459 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
564 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
779 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22c224f512im40.h495 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
602 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
822 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27c230f768im32.h529 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
636 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
856 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base poi…
Defr32bg27c230f768im40.h549 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
656 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
876 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base poi…
Defr32bg27c140f768im32.h534 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
641 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
861 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base poi…
Defr32bg27c140f768im40.h550 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
657 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
877 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base poi…
Defr32bg27c320f768gj39.h535 #define HFXO0_S_BASE (0x4000C000UL) /* HFXO0_S base address */ macro
642 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
862 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base poi…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24b310f1536im48.h571 #define HFXO0_S_BASE (0x4A004000UL) /* HFXO0_S base address */ macro
866 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
954 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base …
Defr32mg24b220f1536im48.h569 #define HFXO0_S_BASE (0x4A004000UL) /* HFXO0_S base address */ macro
858 #define HFXO0_BASE (HFXO0_S_BASE) /* HFXO0 base address */
945 #define HFXO0_S ((HFXO_TypeDef *) HFXO0_S_BASE) /**< HFXO0_S base …