| /hal_silabs-3.5.0/gecko/emlib/inc/ |
| D | sli_em_cmu.h | 1398 BUS_RegBitWrite(&CMU->HFCORECLKEN0, _CMU_HFCORECLKEN0_LE_SHIFT, 1); \
1439 BUS_RegBitWrite(&CMU->HFCORECLKEN0, _CMU_HFCORECLKEN0_LE_SHIFT, 1); \
1483 BUS_RegBitWrite(&CMU->HFCORECLKEN0, _CMU_HFCORECLKEN0_LE_SHIFT, 1); \
1524 BUS_RegBitWrite(&CMU->HFCORECLKEN0, _CMU_HFCORECLKEN0_LE_SHIFT, 1); \
|
| /hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32HG/Include/ |
| D | efm32hg_cmu.h | 63 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
|
| D | efm32hg110f32.h | 268 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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| D | efm32hg110f64.h | 268 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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| D | efm32hg210f32.h | 268 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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| D | efm32hg210f64.h | 268 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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| D | efm32hg222f32.h | 268 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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| D | efm32hg222f64.h | 268 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
|
| /hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/ |
| D | efm32wg_cmu.h | 63 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
|
| D | efm32wg380f128.h | 320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
|
| D | efm32wg380f64.h | 320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
|
| D | efm32wg390f128.h | 320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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| D | efm32wg395f256.h | 320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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| D | efm32wg380f256.h | 320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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| D | efm32wg390f256.h | 320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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| D | efm32wg390f64.h | 320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
|
| D | efm32wg395f128.h | 320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
|
| D | efm32wg395f64.h | 320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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| D | efm32wg880f128.h | 314 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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| D | efm32wg890f256.h | 314 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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| D | efm32wg895f128.h | 314 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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| D | efm32wg895f256.h | 314 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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| D | efm32wg895f64.h | 314 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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| D | efm32wg295f256.h | 311 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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| D | efm32wg280f128.h | 311 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
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