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Searched refs:FSRCO_S_BASE (Results 1 – 21 of 21) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21a010f1024im32.h463 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
576 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
783 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base …
Defr32mg21a010f512im32.h463 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
576 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
783 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base …
Defr32mg21a010f768im32.h463 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
576 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
783 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base …
Defr32mg21a020f1024im32.h465 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
578 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
785 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base …
Defr32mg21a020f512im32.h465 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
578 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
785 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base …
Defr32mg21a020f768im32.h465 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
578 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
785 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base …
Defr32mg21b010f1024im32.h463 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
576 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
783 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base …
Defr32mg21b010f768im32.h463 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
576 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
783 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base …
Defr32mg21b020f1024im32.h465 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
578 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
785 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base …
Defr32mg21b010f512im32.h463 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
576 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
783 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base …
Defr32mg21b020f512im32.h465 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
578 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
785 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base …
Defr32mg21b020f768im32.h465 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
578 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
785 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base …
Drm21z000f1024im32.h461 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
574 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
781 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22c224f512im40.h497 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
612 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
824 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRC…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27c230f768im32.h531 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
646 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
858 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base poi…
Defr32bg27c230f768im40.h551 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
666 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
878 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base poi…
Defr32bg27c140f768im32.h536 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
651 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
863 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base poi…
Defr32bg27c140f768im40.h552 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
667 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
879 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base poi…
Defr32bg27c320f768gj39.h537 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
652 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
864 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base poi…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24b310f1536im48.h530 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
661 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
913 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base …
Defr32mg24b220f1536im48.h529 #define FSRCO_S_BASE (0x40018000UL) /* FSRCO_S base address */ macro
658 #define FSRCO_BASE (FSRCO_S_BASE) /* FSRCO base address */
905 #define FSRCO_S ((FSRCO_TypeDef *) FSRCO_S_BASE) /**< FSRCO_S base …