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Searched refs:FSRCO_NS_BASE (Results 1 – 21 of 21) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21a010f1024im32.h506 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
578 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
826 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base…
Defr32mg21a010f512im32.h506 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
578 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
826 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base…
Defr32mg21a010f768im32.h506 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
578 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
826 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base…
Defr32mg21a020f1024im32.h508 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
580 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
828 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base…
Defr32mg21a020f512im32.h508 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
580 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
828 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base…
Defr32mg21a020f768im32.h508 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
580 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
828 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base…
Defr32mg21b010f1024im32.h506 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
578 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
826 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base…
Defr32mg21b010f768im32.h506 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
578 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
826 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base…
Defr32mg21b020f1024im32.h508 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
580 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
828 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base…
Defr32mg21b010f512im32.h506 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
578 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
826 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base…
Defr32mg21b020f512im32.h508 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
580 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
828 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base…
Defr32mg21b020f768im32.h508 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
580 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
828 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base…
Drm21z000f1024im32.h504 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
576 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
824 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22c224f512im40.h541 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
614 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
868 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRC…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27c230f768im32.h575 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
648 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
902 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base po…
Defr32bg27c230f768im40.h595 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
668 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
922 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base po…
Defr32bg27c140f768im32.h580 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
653 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
907 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base po…
Defr32bg27c140f768im40.h596 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
669 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
923 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base po…
Defr32bg27c320f768gj39.h581 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
654 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
908 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base po…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24b310f1536im48.h582 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
663 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
965 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base…
Defr32mg24b220f1536im48.h580 #define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */ macro
660 #define FSRCO_BASE (FSRCO_NS_BASE) /* FSRCO base address */
956 #define FSRCO_NS ((FSRCO_TypeDef *) FSRCO_NS_BASE) /**< FSRCO_NS base…