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Searched refs:SIO_BASE (Results 1 – 17 of 17) sorted by relevance

/hal_rpi_pico-latest/src/rp2_common/hardware_divider/
Ddivider.S13 ldr r3, =(SIO_BASE)
21 ldr r3, =(SIO_BASE)
40 ldr r3, =SIO_BASE
52 ldr r3, =SIO_BASE
/hal_rpi_pico-latest/src/rp2_common/hardware_sync_spin_lock/include/hardware/sync/
Dspin_lock.h230 return (spin_lock_t *) (SIO_BASE + SIO_SPINLOCK0_OFFSET + lock_num * 4); in spin_lock_instance()
246 invalid_params_if(HARDWARE_SYNC, (uint) lock < SIO_BASE + SIO_SPINLOCK0_OFFSET || in spin_lock_get_num()
247 … (uint) lock >= NUM_SPIN_LOCKS * sizeof(spin_lock_t) + SIO_BASE + SIO_SPINLOCK0_OFFSET || in spin_lock_get_num()
248 … ((uint) lock - SIO_BASE + SIO_SPINLOCK0_OFFSET) % sizeof(spin_lock_t) != 0); in spin_lock_get_num()
249 return (uint) (lock - (spin_lock_t *) (SIO_BASE + SIO_SPINLOCK0_OFFSET)); in spin_lock_get_num()
318 return 0 != (*(io_ro_32 *) (SIO_BASE + SIO_SPINLOCK_ST_OFFSET) & (1u << lock_num)); in is_spin_locked()
/hal_rpi_pico-latest/src/rp2040/hardware_structs/include/hardware/structs/
Dinterp.h80 #define interp_hw_array ((interp_hw_t *)(SIO_BASE + SIO_INTERP0_ACCUM0_OFFSET))
Dsio.h196 #define sio_hw ((sio_hw_t *)SIO_BASE)
/hal_rpi_pico-latest/src/rp2350/hardware_structs/include/hardware/structs/
Dinterp.h80 #define interp_hw_array ((interp_hw_t *)(SIO_BASE + SIO_INTERP0_ACCUM0_OFFSET))
Dtmds_encode.h87 #define tmds_encode_hw ((tmds_encode_hw_t *)(SIO_BASE + SIO_TMDS_CTRL_OFFSET))
Dsio.h331 #define sio_hw ((sio_hw_t *)SIO_BASE)
/hal_rpi_pico-latest/src/rp2_common/pico_divider/
Ddivider_hardware.S56 ldr r6, =SIO_BASE
81 ldr r2, =SIO_BASE
103 ldr r2, =SIO_BASE
114 ldr r2, =SIO_BASE
165 ldr r2, =SIO_BASE
176 ldr r2, =SIO_BASE
225 ldr r2, =SIO_BASE
253 ldr r2, =SIO_BASE
350 ldr r7,=SIO_BASE
400 ldr r7,=SIO_BASE
[all …]
/hal_rpi_pico-latest/src/rp2040/pico_platform/include/pico/
Dplatform.h135 return (*(uint32_t *) (SIO_BASE + SIO_CPUID_OFFSET)); in get_core_num()
/hal_rpi_pico-latest/src/rp2040/hardware_regs/include/hardware/regs/
Daddressmap.h77 #define SIO_BASE _u(0xd0000000) macro
/hal_rpi_pico-latest/src/rp2350/pico_platform/include/pico/
Dplatform.h153 return (*(uint32_t *) (SIO_BASE + SIO_CPUID_OFFSET)); in get_core_num()
/hal_rpi_pico-latest/src/rp2_common/pico_double/
Ddouble_aeabi_rp2040.S184 ldr r2, =(SIO_BASE)
203 ldr r2, =(SIO_BASE)
207 ldr r2, =(SIO_BASE)
791 ldr r2, =(SIO_BASE)
809 ldr r2, =(SIO_BASE)
813 ldr r2, =(SIO_BASE)
/hal_rpi_pico-latest/src/rp2350/hardware_regs/include/hardware/regs/
Daddressmap.h105 #define SIO_BASE _u(0xd0000000) macro
/hal_rpi_pico-latest/src/rp2_common/pico_float/
Dfloat_aeabi_rp2040.S151 ldr r2, =(SIO_BASE)
170 ldr r2, =(SIO_BASE)
725 ldr r2, =(SIO_BASE)
744 ldr r2, =(SIO_BASE)
/hal_rpi_pico-latest/src/rp2_common/pico_crt0/
Dcrt0.S385 ldr r0, =(SIO_BASE + SIO_CPUID_OFFSET)
/hal_rpi_pico-latest/src/rp2_common/cmsis/stub/CMSIS/Device/RP2040/Include/
DRP2040.h2605 #define SIO_BASE 0xD0000000UL macro
2654 #define SIO ((SIO_Type*) SIO_BASE)
/hal_rpi_pico-latest/src/rp2_common/cmsis/stub/CMSIS/Device/RP2350/Include/
DRP2350.h5977 #define SIO_BASE 0xD0000000UL macro
6043 #define SIO ((SIO_Type*) SIO_BASE)