| /hal_renesas-latest/drivers/ra/fsp/src/r_spi/ |
| D | r_spi.c | 75 static fsp_err_t r_spi_transfer_config(spi_cfg_t const * const p_cfg);
148 fsp_err_t R_SPI_Open (spi_ctrl_t * p_api_ctrl, spi_cfg_t const * const p_cfg) in R_SPI_Open() argument
157 FSP_ASSERT(NULL != p_cfg); in R_SPI_Open()
158 FSP_ASSERT(NULL != p_cfg->p_callback); in R_SPI_Open()
159 FSP_ASSERT(NULL != p_cfg->p_extend); in R_SPI_Open()
160 FSP_ERROR_RETURN(BSP_FEATURE_SPI_MAX_CHANNEL > p_cfg->channel, FSP_ERR_IP_CHANNEL_NOT_PRESENT); in R_SPI_Open()
161 FSP_ASSERT(p_cfg->tei_irq >= 0); in R_SPI_Open()
162 FSP_ASSERT(p_cfg->eri_irq >= 0); in R_SPI_Open()
166 if (SPI_MODE_SLAVE == p_cfg->operating_mode) in R_SPI_Open()
168 FSP_ERROR_RETURN(SPI_CLK_PHASE_EDGE_EVEN == p_cfg->clk_phase, FSP_ERR_UNSUPPORTED); in R_SPI_Open()
[all …]
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| /hal_renesas-latest/drivers/ra/fsp/src/r_lpm/ |
| D | r_lpm.c | 103 static fsp_err_t r_lpm_configure(lpm_cfg_t const * const p_cfg);
113 static uint8_t r_lpm_lpscr_calculate(lpm_cfg_t const * p_cfg);
117 static fsp_err_t r_lpm_mcu_specific_low_power_check(lpm_cfg_t const * const p_cfg);
150 fsp_err_t R_LPM_Open (lpm_ctrl_t * const p_api_ctrl, lpm_cfg_t const * const p_cfg) in R_LPM_Open() argument
159 p_ctrl->p_cfg = p_cfg; in R_LPM_Open()
161 fsp_err_t err = r_lpm_configure(p_cfg); in R_LPM_Open()
196 fsp_err_t R_LPM_LowPowerReconfigure (lpm_ctrl_t * const p_api_ctrl, lpm_cfg_t const * const p_cfg) in R_LPM_LowPowerReconfigure() argument
206 p_ctrl->p_cfg = p_cfg; in R_LPM_LowPowerReconfigure()
208 return r_lpm_configure(p_cfg); in R_LPM_LowPowerReconfigure()
237 if (LPM_MODE_STANDBY <= p_ctrl->p_cfg->low_power_mode) in R_LPM_LowPowerModeEnter()
[all …]
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| /hal_renesas-latest/drivers/rz/fsp/src/rzg/r_rspi/ |
| D | r_rspi.c | 65 …d r_rspi_init_control_structure(rspi_instance_ctrl_t * p_ctrl, spi_cfg_t const * const p_cfg);
83 …tic fsp_err_t r_rspi_transfer_config(rspi_instance_ctrl_t * p_ctrl, spi_cfg_t const * const p_cfg);
139 fsp_err_t R_RSPI_Open (spi_ctrl_t * p_api_ctrl, spi_cfg_t const * const p_cfg) in R_RSPI_Open() argument
148 FSP_ASSERT(NULL != p_cfg); in R_RSPI_Open()
149 FSP_ASSERT(NULL != p_cfg->p_extend); in R_RSPI_Open()
150 …FSP_ERROR_RETURN(BSP_FEATURE_RSPI_VALID_CHANNELS_MASK & (1 << p_cfg->channel), FSP_ERR_IP_CHANNEL_… in R_RSPI_Open()
151 FSP_ASSERT(p_cfg->eri_irq >= 0); in R_RSPI_Open()
155 r_rspi_init_control_structure(p_ctrl, p_cfg); in R_RSPI_Open()
166 err = r_rspi_transfer_config(p_ctrl, p_cfg); in R_RSPI_Open()
328 if (NULL != p_ctrl->p_cfg->p_transfer_rx) in R_RSPI_Close()
[all …]
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| /hal_renesas-latest/drivers/rz/fsp/src/rzn/r_sci_uart/ |
| D | r_sci_uart.c | 173 …_uart_config_set(sci_uart_instance_ctrl_t * const p_instance_ctrl, uart_cfg_t const * const p_cfg);
182 uart_cfg_t const * const p_cfg);
198 …d r_sci_irqs_cfg(sci_uart_instance_ctrl_t * const p_instance_ctrl, uart_cfg_t const * const p_cfg);
313 fsp_err_t R_SCI_UART_Open (uart_ctrl_t * const p_ctrl, uart_cfg_t const * const p_cfg) in R_SCI_UART_Open() argument
321 FSP_ASSERT(p_cfg); in R_SCI_UART_Open()
322 FSP_ASSERT(p_cfg->p_callback); in R_SCI_UART_Open()
323 FSP_ASSERT(p_cfg->p_extend); in R_SCI_UART_Open()
324 FSP_ASSERT(((sci_uart_extended_cfg_t *) p_cfg->p_extend)->p_baud_setting); in R_SCI_UART_Open()
328 …FSP_ERROR_RETURN(BSP_FEATURE_SCI_CHANNELS & (1U << p_cfg->channel), FSP_ERR_IP_CHANNEL_NOT_PRESENT… in R_SCI_UART_Open()
332 if (NULL != p_cfg->p_transfer_rx) in R_SCI_UART_Open()
[all …]
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| /hal_renesas-latest/drivers/ra/fsp/src/r_spi_b/ |
| D | r_spi_b.c | 57 static fsp_err_t r_spi_b_transfer_config(spi_cfg_t const * const p_cfg);
127 fsp_err_t R_SPI_B_Open (spi_ctrl_t * p_api_ctrl, spi_cfg_t const * const p_cfg) in R_SPI_B_Open() argument
136 FSP_ASSERT(NULL != p_cfg); in R_SPI_B_Open()
137 FSP_ASSERT(NULL != p_cfg->p_callback); in R_SPI_B_Open()
138 FSP_ASSERT(NULL != p_cfg->p_extend); in R_SPI_B_Open()
139 FSP_ERROR_RETURN(BSP_FEATURE_SPI_MAX_CHANNEL > p_cfg->channel, FSP_ERR_IP_CHANNEL_NOT_PRESENT); in R_SPI_B_Open()
140 FSP_ASSERT(p_cfg->rxi_irq >= 0); in R_SPI_B_Open()
141 FSP_ASSERT(p_cfg->txi_irq >= 0); in R_SPI_B_Open()
142 FSP_ASSERT(p_cfg->tei_irq >= 0); in R_SPI_B_Open()
143 FSP_ASSERT(p_cfg->eri_irq >= 0); in R_SPI_B_Open()
[all …]
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| /hal_renesas-latest/drivers/rz/fsp/src/rzn/r_icu/ |
| D | r_icu.c | 90 … R_ICU_ExternalIrqOpen (external_irq_ctrl_t * const p_ctrl, external_irq_cfg_t const * const p_cfg) in R_ICU_ExternalIrqOpen() argument
97 FSP_ASSERT(NULL != p_cfg); in R_ICU_ExternalIrqOpen()
98 …FSP_ERROR_RETURN(0 != ((1U << p_cfg->channel) & BSP_FEATURE_ICU_IRQ_CHANNELS_MASK), FSP_ERR_IP_CHA… in R_ICU_ExternalIrqOpen()
101 if (p_cfg->p_callback) in R_ICU_ExternalIrqOpen()
103 FSP_ERROR_RETURN(BSP_IRQ_DISABLED != p_cfg->ipl, FSP_ERR_INVALID_ARGUMENT); in R_ICU_ExternalIrqOpen()
107 p_instance_ctrl->irq = p_cfg->irq; in R_ICU_ExternalIrqOpen()
108 p_instance_ctrl->channel = p_cfg->channel; in R_ICU_ExternalIrqOpen()
111 p_instance_ctrl->p_callback = p_cfg->p_callback; in R_ICU_ExternalIrqOpen()
112 p_instance_ctrl->p_context = p_cfg->p_context; in R_ICU_ExternalIrqOpen()
119 clksel &= ~(ICU_PORTNF_CLKSEL_MASK << ICU_NS_PORTNF_OFFSET(p_cfg->channel)); in R_ICU_ExternalIrqOpen()
[all …]
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| /hal_renesas-latest/drivers/ra/fsp/src/r_glcdc/ |
| D | r_glcdc.c | 186 static void r_glcdc_sync_signal_set(display_cfg_t const * const p_cfg);
188 static void r_glcdc_background_screen_set(display_cfg_t const * const p_cfg);
194 static void r_glcdc_output_block_set(display_cfg_t const * const p_cfg);
205 static void r_glcdc_clock_set(display_cfg_t const * const p_cfg);
209 static fsp_err_t r_glcdc_open_param_check(display_cfg_t const * const p_cfg);
236 static void r_glcdc_color_correction_order(display_cfg_t const * const p_cfg);
238 static void r_glcdc_gamma_correction(display_cfg_t const * const p_cfg);
344 fsp_err_t R_GLCDC_Open (display_ctrl_t * const p_api_ctrl, display_cfg_t const * const p_cfg) in R_GLCDC_Open() argument
354 err = r_glcdc_open_param_check(p_cfg); in R_GLCDC_Open()
370 r_glcdc_clock_set(p_cfg); in R_GLCDC_Open()
[all …]
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| /hal_renesas-latest/drivers/rz/fsp/src/rzg/r_scif_uart/ |
| D | r_scif_uart.c | 89 …d r_scif_uart_config_set(scif_uart_instance_ctrl_t * const p_ctrl, uart_cfg_t const * const p_cfg);
98 …tic void r_scif_irqs_cfg(scif_uart_instance_ctrl_t * const p_ctrl, uart_cfg_t const * const p_cfg);
124 …_scif_uart_transfer_open(scif_uart_instance_ctrl_t * const p_ctrl, uart_cfg_t const * const p_cfg);
205 fsp_err_t R_SCIF_UART_Open (uart_ctrl_t * const p_api_ctrl, uart_cfg_t const * const p_cfg) in R_SCIF_UART_Open() argument
213 FSP_ASSERT(p_cfg); in R_SCIF_UART_Open()
214 FSP_ASSERT(p_cfg->p_extend); in R_SCIF_UART_Open()
215 FSP_ASSERT(((scif_uart_extended_cfg_t *) p_cfg->p_extend)->p_baud_setting); in R_SCIF_UART_Open()
219 …FSP_ERROR_RETURN(BSP_FEATURE_SCIF_CHANNELS & (1U << p_cfg->channel), FSP_ERR_IP_CHANNEL_NOT_PRESEN… in R_SCIF_UART_Open()
221 FSP_ASSERT(p_cfg->rxi_irq >= 0); in R_SCIF_UART_Open()
222 FSP_ASSERT(p_cfg->txi_irq >= 0); in R_SCIF_UART_Open()
[all …]
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| /hal_renesas-latest/drivers/ra/fsp/src/r_sci_uart/ |
| D | r_sci_uart.c | 169 …oid r_sci_uart_config_set(sci_uart_instance_ctrl_t * const p_ctrl, uart_cfg_t const * const p_cfg);
177 … r_sci_uart_transfer_open(sci_uart_instance_ctrl_t * const p_ctrl, uart_cfg_t const * const p_cfg);
193 static void r_sci_irqs_cfg(sci_uart_instance_ctrl_t * const p_ctrl, uart_cfg_t const * const p_cfg);
300 fsp_err_t R_SCI_UART_Open (uart_ctrl_t * const p_api_ctrl, uart_cfg_t const * const p_cfg) in R_SCI_UART_Open() argument
308 FSP_ASSERT(p_cfg); in R_SCI_UART_Open()
310 FSP_ASSERT(p_cfg->p_extend); in R_SCI_UART_Open()
311 FSP_ASSERT(((sci_uart_extended_cfg_t *) p_cfg->p_extend)->p_baud_setting); in R_SCI_UART_Open()
315 …FSP_ERROR_RETURN(BSP_FEATURE_SCI_CHANNELS & (1U << p_cfg->channel), FSP_ERR_IP_CHANNEL_NOT_PRESENT… in R_SCI_UART_Open()
317 if (((sci_uart_extended_cfg_t *) p_cfg->p_extend)->flow_control == SCI_UART_FLOW_CONTROL_CTSRTS) in R_SCI_UART_Open()
320 … ((sci_uart_extended_cfg_t *) p_cfg->p_extend)->flow_control_pin != SCI_UART_INVALID_16BIT_PARAM, in R_SCI_UART_Open()
[all …]
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| /hal_renesas-latest/drivers/ra/fsp/src/r_iic_master/ |
| D | r_iic_master.c | 146 static fsp_err_t iic_master_transfer_open(i2c_master_cfg_t const * const p_cfg);
160 i2c_master_cfg_t const * const p_cfg);
208 …rr_t R_IIC_MASTER_Open (i2c_master_ctrl_t * const p_api_ctrl, i2c_master_cfg_t const * const p_cfg) in R_IIC_MASTER_Open() argument
213 FSP_ASSERT(p_cfg != NULL); in R_IIC_MASTER_Open()
214 FSP_ASSERT(p_cfg->p_extend != NULL); in R_IIC_MASTER_Open()
215 FSP_ASSERT(p_cfg->rxi_irq >= (IRQn_Type) 0); in R_IIC_MASTER_Open()
216 FSP_ASSERT(p_cfg->txi_irq >= (IRQn_Type) 0); in R_IIC_MASTER_Open()
217 FSP_ASSERT(p_cfg->tei_irq >= (IRQn_Type) 0); in R_IIC_MASTER_Open()
218 FSP_ASSERT(p_cfg->eri_irq >= (IRQn_Type) 0); in R_IIC_MASTER_Open()
221 …FSP_ERROR_RETURN(BSP_FEATURE_IIC_VALID_CHANNEL_MASK & (1 << p_cfg->channel), FSP_ERR_IP_CHANNEL_NO… in R_IIC_MASTER_Open()
[all …]
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| /hal_renesas-latest/drivers/ra/fsp/src/r_sci_b_uart/ |
| D | r_sci_b_uart.c | 158 …r_sci_b_uart_config_set(sci_b_uart_instance_ctrl_t * const p_ctrl, uart_cfg_t const * const p_cfg);
166 …ci_b_uart_transfer_open(sci_b_uart_instance_ctrl_t * const p_ctrl, uart_cfg_t const * const p_cfg);
181 …c void r_sci_b_irqs_cfg(sci_b_uart_instance_ctrl_t * const p_ctrl, uart_cfg_t const * const p_cfg);
278 fsp_err_t R_SCI_B_UART_Open (uart_ctrl_t * const p_api_ctrl, uart_cfg_t const * const p_cfg) in R_SCI_B_UART_Open() argument
286 FSP_ASSERT(p_cfg); in R_SCI_B_UART_Open()
288 FSP_ASSERT(p_cfg->p_extend); in R_SCI_B_UART_Open()
289 FSP_ASSERT(((sci_b_uart_extended_cfg_t *) p_cfg->p_extend)->p_baud_setting); in R_SCI_B_UART_Open()
293 …FSP_ERROR_RETURN(BSP_FEATURE_SCI_CHANNELS & (1U << p_cfg->channel), FSP_ERR_IP_CHANNEL_NOT_PRESENT… in R_SCI_B_UART_Open()
295 …if (((sci_b_uart_extended_cfg_t *) p_cfg->p_extend)->flow_control == SCI_B_UART_FLOW_CONTROL_CTSRT… in R_SCI_B_UART_Open()
298 …((sci_b_uart_extended_cfg_t *) p_cfg->p_extend)->flow_control_pin != SCI_B_UART_INVALID_16BIT_PARA… in R_SCI_B_UART_Open()
[all …]
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| /hal_renesas-latest/drivers/rz/fsp/src/rzg/r_riic_master/ |
| D | r_riic_master.c | 129 i2c_master_cfg_t const * const p_cfg);
137 static fsp_err_t iic_master_transfer_open(i2c_master_cfg_t const * const p_cfg);
186 …r_t R_RIIC_MASTER_Open (i2c_master_ctrl_t * const p_api_ctrl, i2c_master_cfg_t const * const p_cfg) in R_RIIC_MASTER_Open() argument
192 FSP_ASSERT(p_cfg != NULL); in R_RIIC_MASTER_Open()
194 riic_master_extended_cfg_t * p_extend = (riic_master_extended_cfg_t *) p_cfg->p_extend; in R_RIIC_MASTER_Open()
196 FSP_ASSERT(p_cfg->rxi_irq >= (IRQn_Type) 0); in R_RIIC_MASTER_Open()
197 FSP_ASSERT(p_cfg->txi_irq >= (IRQn_Type) 0); in R_RIIC_MASTER_Open()
198 FSP_ASSERT(p_cfg->tei_irq >= (IRQn_Type) 0); in R_RIIC_MASTER_Open()
206 …FSP_ERROR_RETURN(BSP_FEATURE_IIC_VALID_CHANNEL_MASK & (1 << p_cfg->channel), FSP_ERR_IP_CHANNEL_NO… in R_RIIC_MASTER_Open()
211 …(R_RIIC0_Type *) ((uint32_t) R_RIIC0 + (p_cfg->channel * ((uint32_t) R_RIIC1 - (uint32_t) R_RIIC0)… in R_RIIC_MASTER_Open()
[all …]
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| /hal_renesas-latest/drivers/ra/fsp/src/r_mipi_dsi/ |
| D | r_mipi_dsi.c | 78 static void dsi_init_timing(mipi_dsi_cfg_t const * const p_cfg);
79 static void dsi_exit_reset(mipi_dsi_cfg_t const * const p_cfg);
83 static void dsi_init_video(mipi_dsi_cfg_t const * p_cfg);
110 fsp_err_t R_MIPI_DSI_Open (mipi_dsi_ctrl_t * const p_api_ctrl, mipi_dsi_cfg_t const * const p_cfg) in R_MIPI_DSI_Open() argument
116 FSP_ASSERT(NULL != p_cfg); in R_MIPI_DSI_Open()
126 p_ctrl->p_cfg = p_cfg; in R_MIPI_DSI_Open()
131 err = r_mipi_phy_open(p_cfg->p_mipi_phy_instance->p_ctrl, p_cfg->p_mipi_phy_instance->p_cfg); in R_MIPI_DSI_Open()
136 dsi_init_timing(p_cfg); in R_MIPI_DSI_Open()
137 dsi_exit_reset(p_cfg); in R_MIPI_DSI_Open()
140 mipi_dsi_extended_cfg_t * p_extend = (mipi_dsi_extended_cfg_t *) p_cfg->p_extend; in R_MIPI_DSI_Open()
[all …]
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| /hal_renesas-latest/drivers/ra/fsp/src/r_agt/ |
| D | r_agt.c | 47 …#define AGT_PRV_DETERMINE_IS_AGTW(p_cfg) (((agt_extended_cfg_t const *) (p_cfg)->p_extend… argument
50 #define AGT_PRV_DETERMINE_IS_AGTW(p_cfg) (true) argument
53 #define AGT_PRV_DETERMINE_IS_AGTW(p_cfg) (false) argument
84 …d r_agt_hardware_cfg(agt_instance_ctrl_t * const p_instance_ctrl, timer_cfg_t const * const p_cfg);
91 … r_agt_open_param_checking(agt_instance_ctrl_t * p_instance_ctrl, timer_cfg_t const * const p_cfg);
157 fsp_err_t R_AGT_Open (timer_ctrl_t * const p_ctrl, timer_cfg_t const * const p_cfg) in R_AGT_Open() argument
162 fsp_err_t err = r_agt_open_param_checking(p_instance_ctrl, p_cfg); in R_AGT_Open()
165 p_instance_ctrl->p_cfg = p_cfg; in R_AGT_Open()
166 p_instance_ctrl->is_agtw = AGT_PRV_DETERMINE_IS_AGTW(p_cfg); in R_AGT_Open()
176 uint32_t channel_base_address = base_address + (p_cfg->channel * AGT_PRV_CHANNEL_SIZE); in R_AGT_Open()
[all …]
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| /hal_renesas-latest/drivers/rz/fsp/src/rzg/r_mhu_ns/ |
| D | r_mhu_ns.c | 40 …hu_ns_open_param_checking(mhu_ns_instance_ctrl_t * p_instance_ctrl, mhu_cfg_t const * const p_cfg);
90 fsp_err_t R_MHU_NS_Open (mhu_ctrl_t * const p_ctrl, mhu_cfg_t const * const p_cfg) in R_MHU_NS_Open() argument
95 fsp_err_t err = r_mhu_ns_open_param_checking(p_instance_ctrl, p_cfg); in R_MHU_NS_Open()
100 (p_cfg->channel * in R_MHU_NS_Open()
102 p_instance_ctrl->p_cfg = p_cfg; in R_MHU_NS_Open()
103 p_instance_ctrl->channel = p_cfg->channel; in R_MHU_NS_Open()
106 ((1U << p_cfg->channel) & in R_MHU_NS_Open()
109 if (0 != p_cfg->p_shared_memory) in R_MHU_NS_Open()
114 … p_instance_ctrl->p_shared_memory_tx = (uint32_t *) (((uint32_t) p_cfg->p_shared_memory) + in R_MHU_NS_Open()
116 … p_instance_ctrl->p_shared_memory_rx = (uint32_t *) (((uint32_t) p_cfg->p_shared_memory) + in R_MHU_NS_Open()
[all …]
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| /hal_renesas-latest/drivers/rz/fsp/src/rzg/r_gtm/ |
| D | r_gtm.c | 38 … r_gtm_open_param_checking(gtm_instance_ctrl_t * p_instance_ctrl, timer_cfg_t const * const p_cfg);
96 fsp_err_t R_GTM_Open (timer_ctrl_t * const p_ctrl, timer_cfg_t const * const p_cfg) in R_GTM_Open() argument
101 fsp_err_t err = r_gtm_open_param_checking(p_instance_ctrl, p_cfg); in R_GTM_Open()
107 (p_cfg->channel * ((intptr_t) R_GTM1_BASE - (intptr_t) R_GTM0_BASE)); in R_GTM_Open()
109 p_instance_ctrl->p_cfg = p_cfg; in R_GTM_Open()
112 R_BSP_MODULE_START(FSP_IP_GTM, p_cfg->channel); in R_GTM_Open()
118 r_gtm_period_register_set(p_instance_ctrl, p_cfg->period_counts); in R_GTM_Open()
122 gtm_extended_cfg_t * p_ext = (gtm_extended_cfg_t *) p_cfg->p_extend; in R_GTM_Open()
135 if (p_cfg->cycle_end_irq >= 0) in R_GTM_Open()
137 R_BSP_IrqCfgEnable(p_cfg->cycle_end_irq, p_cfg->cycle_end_ipl, p_instance_ctrl); in R_GTM_Open()
[all …]
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| /hal_renesas-latest/drivers/ra/fsp/src/r_ulpt/ |
| D | r_ulpt.c | 40 … void r_ulpt_hardware_cfg(ulpt_instance_ctrl_t * p_instance_ctrl, timer_cfg_t const * const p_cfg);
46 …_ulpt_open_param_checking(ulpt_instance_ctrl_t * p_instance_ctrl, timer_cfg_t const * const p_cfg);
105 fsp_err_t R_ULPT_Open (timer_ctrl_t * const p_ctrl, timer_cfg_t const * const p_cfg) in R_ULPT_Open() argument
110 fsp_err_t err = r_ulpt_open_param_checking(p_instance_ctrl, p_cfg); in R_ULPT_Open()
115 (p_cfg->channel * ((uint32_t) R_ULPT1_BASE - (uint32_t) R_ULPT0_BASE)); in R_ULPT_Open()
118 p_instance_ctrl->p_cfg = p_cfg; in R_ULPT_Open()
121 R_BSP_MODULE_START(FSP_IP_ULPT, p_cfg->channel); in R_ULPT_Open()
133 r_ulpt_hardware_cfg(p_instance_ctrl, p_cfg); in R_ULPT_Open()
136 r_ulpt_period_register_set(p_instance_ctrl, p_cfg->period_counts); in R_ULPT_Open()
138 if (p_cfg->cycle_end_irq >= 0) in R_ULPT_Open()
[all …]
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| /hal_renesas-latest/drivers/ra/fsp/src/r_gpt/ |
| D | r_gpt.c | 97 …_hardware_initialize(gpt_instance_ctrl_t * const p_instance_ctrl, timer_cfg_t const * const p_cfg);
99 …void gpt_common_open(gpt_instance_ctrl_t * const p_instance_ctrl, timer_cfg_t const * const p_cfg);
121 static uint32_t gpt_gtior_calculate(timer_cfg_t const * const p_cfg, gpt_pin_level_t const stop_lev…
194 fsp_err_t R_GPT_Open (timer_ctrl_t * const p_ctrl, timer_cfg_t const * const p_cfg) in R_GPT_Open() argument
198 FSP_ASSERT(NULL != p_cfg); in R_GPT_Open()
199 FSP_ASSERT(NULL != p_cfg->p_extend); in R_GPT_Open()
204 FSP_ASSERT(p_cfg->source_div <= 10U); in R_GPT_Open()
206 FSP_ASSERT((p_cfg->source_div != 7U) && (p_cfg->source_div != 9U) && (p_cfg->source_div <= 10)); in R_GPT_Open()
209 FSP_ASSERT((0U == (p_cfg->source_div % 2U)) && (p_cfg->source_div <= 10)); in R_GPT_Open()
213 FSP_ERROR_RETURN(p_cfg->mode <= TIMER_MODE_ONE_SHOT_PULSE, FSP_ERR_INVALID_MODE); in R_GPT_Open()
[all …]
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| /hal_renesas-latest/drivers/ra/fsp/src/r_usb_device/ |
| D | r_usb_device.c | 124 …tic inline void physical_init(usbd_instance_ctrl_t * const p_ctrl, usbd_cfg_t const * const p_cfg);
126 static inline void usb_interrupt_configure(usbd_instance_ctrl_t * p_ctrl, usbd_cfg_t const * p_cfg);
149 fsp_err_t R_USBD_Open (usbd_ctrl_t * const p_api_ctrl, usbd_cfg_t const * const p_cfg) in R_USBD_Open() argument
155 FSP_ASSERT(p_cfg); in R_USBD_Open()
159 FSP_ERROR_RETURN(USB_NUM_USBIP > p_cfg->module_number, FSP_ERR_IP_CHANNEL_NOT_PRESENT); in R_USBD_Open()
162 if (USB_IP0_MODULE == p_cfg->module_number) in R_USBD_Open()
164 FSP_ERROR_RETURN((USBD_SPEED_FS == p_cfg->usb_speed), FSP_ERR_INVALID_ARGUMENT); in R_USBD_Open()
168 if (USB_IP1_MODULE == p_cfg->module_number) in R_USBD_Open()
170 FSP_ERROR_RETURN((USBD_SPEED_FS == p_cfg->usb_speed) || (USBD_SPEED_HS == p_cfg->usb_speed), in R_USBD_Open()
176 p_ctrl->p_reg = (void *) (USB_IS_USBHS(p_cfg->module_number) ? R_USB_HS0_BASE : R_USB_FS0_BASE); in R_USBD_Open()
[all …]
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| /hal_renesas-latest/drivers/ra/fsp/src/r_ospi_b/ |
| D | r_ospi_b.c | 171 fsp_err_t R_OSPI_B_Open (spi_flash_ctrl_t * const p_ctrl, spi_flash_cfg_t const * const p_cfg) in R_OSPI_B_Open() argument
177 FSP_ASSERT(NULL != p_cfg); in R_OSPI_B_Open()
178 FSP_ASSERT(NULL != p_cfg->p_extend); in R_OSPI_B_Open()
182 ospi_b_extended_cfg_t * p_cfg_extend = (ospi_b_extended_cfg_t *) p_cfg->p_extend; in R_OSPI_B_Open()
192 p_instance_ctrl->p_cfg = p_cfg; in R_OSPI_B_Open()
193 p_instance_ctrl->spi_protocol = p_cfg->spi_protocol; in R_OSPI_B_Open()
220 p_transfer->p_api->open(p_transfer->p_ctrl, p_transfer->p_cfg); in R_OSPI_B_Open()
237 uint32_t liocfg = ((uint32_t) p_cfg->spi_protocol) << R_XSPI_LIOCFGCS_PRTMD_Pos; in R_OSPI_B_Open()
389 FSP_ASSERT(NULL != p_instance_ctrl->p_cfg); in R_OSPI_B_XipEnter()
420 FSP_ASSERT(NULL != p_instance_ctrl->p_cfg); in R_OSPI_B_XipExit()
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| /hal_renesas-latest/drivers/rz/fsp/src/rzg/r_gpt/ |
| D | r_gpt.c | 81 …_hardware_initialize(gpt_instance_ctrl_t * const p_instance_ctrl, timer_cfg_t const * const p_cfg);
83 …void gpt_common_open(gpt_instance_ctrl_t * const p_instance_ctrl, timer_cfg_t const * const p_cfg);
105 static uint32_t gpt_gtior_calculate(timer_cfg_t const * const p_cfg, gpt_pin_level_t const stop_lev…
172 fsp_err_t R_GPT_Open (timer_ctrl_t * const p_ctrl, timer_cfg_t const * const p_cfg) in R_GPT_Open() argument
176 FSP_ASSERT(NULL != p_cfg); in R_GPT_Open()
177 FSP_ASSERT(NULL != p_cfg->p_extend); in R_GPT_Open()
182 FSP_ASSERT(p_cfg->source_div <= 10U); in R_GPT_Open()
184 FSP_ASSERT((p_cfg->source_div != 7U) && (p_cfg->source_div != 9U) && (p_cfg->source_div <= 10)); in R_GPT_Open()
187 FSP_ASSERT((0U == (p_cfg->source_div % 2U)) && (p_cfg->source_div <= 10)); in R_GPT_Open()
191 FSP_ERROR_RETURN(p_cfg->mode <= TIMER_MODE_ONE_SHOT_PULSE, FSP_ERR_INVALID_MODE); in R_GPT_Open()
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| /hal_renesas-latest/drivers/ra/fsp/src/r_adc/ |
| D | r_adc.c | 88 static fsp_err_t r_adc_open_cfg_check(adc_cfg_t const * const p_cfg);
89 static fsp_err_t r_adc_open_cfg_resolution_check(adc_cfg_t const * const p_cfg);
100 …ic void r_adc_open_sub(adc_instance_ctrl_t * const p_instance_ctrl, adc_cfg_t const * const p_cfg);
178 fsp_err_t R_ADC_Open (adc_ctrl_t * p_ctrl, adc_cfg_t const * const p_cfg) in R_ADC_Open() argument
189 fsp_err_t err = r_adc_open_cfg_check(p_cfg); in R_ADC_Open()
193 err = r_adc_open_cfg_resolution_check(p_cfg); in R_ADC_Open()
200 adc_extended_cfg_t const * p_extend = (adc_extended_cfg_t const *) p_cfg->p_extend; in R_ADC_Open()
201 if (NULL != p_cfg->p_callback) in R_ADC_Open()
203 …FSP_ERROR_RETURN((p_cfg->scan_end_irq >= 0) || (p_extend->window_a_irq >= 0) || (p_extend->window_… in R_ADC_Open()
211 adc_extended_cfg_t const * p_extend = (adc_extended_cfg_t const *) p_cfg->p_extend; in R_ADC_Open()
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| /hal_renesas-latest/drivers/ra/fsp/src/r_qspi/ |
| D | r_qspi.c | 119 fsp_err_t R_QSPI_Open (spi_flash_ctrl_t * p_ctrl, spi_flash_cfg_t const * const p_cfg) in R_QSPI_Open() argument
125 FSP_ASSERT(NULL != p_cfg); in R_QSPI_Open()
127 …FSP_ASSERT((p_cfg->dummy_clocks >= SPI_FLASH_DUMMY_CLOCKS_3 && p_cfg->dummy_clocks <= SPI_FLASH_DU… in R_QSPI_Open()
128 p_cfg->dummy_clocks == SPI_FLASH_DUMMY_CLOCKS_DEFAULT); in R_QSPI_Open()
134 qspi_extended_cfg_t * p_cfg_extend = (qspi_extended_cfg_t *) p_cfg->p_extend; in R_QSPI_Open()
143 R_QSPI->SFMSPC = R_QSPI_SFMSPC_SFMSDE_Msk | p_cfg->spi_protocol; in R_QSPI_Open()
149 R_QSPI->SFMSAC = p_cfg->address_bytes; in R_QSPI_Open()
152 if (SPI_FLASH_DUMMY_CLOCKS_DEFAULT != p_cfg->dummy_clocks) in R_QSPI_Open()
155 dummy_clocks = (uint32_t) p_cfg->dummy_clocks - 2U; in R_QSPI_Open()
165 R_QSPI->SFMSMD = R_QSPI_SFMSMD_SFMPFE_Msk | p_cfg->read_mode; in R_QSPI_Open()
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| /hal_renesas-latest/drivers/ra/fsp/src/r_icu/ |
| D | r_icu.c | 87 …CU_ExternalIrqOpen (external_irq_ctrl_t * const p_api_ctrl, external_irq_cfg_t const * const p_cfg) in R_ICU_ExternalIrqOpen() argument
95 FSP_ASSERT(NULL != p_cfg); in R_ICU_ExternalIrqOpen()
99 FSP_ERROR_RETURN((EXTERNAL_IRQ_TRIG_FALLING == p_cfg->trigger) || in R_ICU_ExternalIrqOpen()
100 (EXTERNAL_IRQ_TRIG_RISING == p_cfg->trigger) || in R_ICU_ExternalIrqOpen()
101 (EXTERNAL_IRQ_TRIG_BOTH_EDGE == p_cfg->trigger), in R_ICU_ExternalIrqOpen()
105 …FSP_ERROR_RETURN(0 != ((1U << p_cfg->channel) & BSP_FEATURE_ICU_IRQ_CHANNELS_MASK), FSP_ERR_IP_CHA… in R_ICU_ExternalIrqOpen()
108 if (p_cfg->p_callback) in R_ICU_ExternalIrqOpen()
110 FSP_ERROR_RETURN(BSP_IRQ_DISABLED != p_cfg->ipl, FSP_ERR_INVALID_ARGUMENT); in R_ICU_ExternalIrqOpen()
114 p_ctrl->irq = p_cfg->irq; in R_ICU_ExternalIrqOpen()
131 p_ctrl->p_callback = p_cfg->p_callback; in R_ICU_ExternalIrqOpen()
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| /hal_renesas-latest/drivers/ra/fsp/src/r_canfd/ |
| D | r_canfd.c | 172 fsp_err_t R_CANFD_Open (can_ctrl_t * const p_api_ctrl, can_cfg_t const * const p_cfg) in R_CANFD_Open() argument
178 FSP_ASSERT(p_cfg); in R_CANFD_Open()
179 FSP_ASSERT(p_cfg->p_extend); in R_CANFD_Open()
180 FSP_ASSERT(p_cfg->p_callback); in R_CANFD_Open()
181 FSP_ASSERT(p_cfg->p_bit_timing); in R_CANFD_Open()
183 uint32_t channel = p_cfg->channel; in R_CANFD_Open()
196 canfd_extended_cfg_t * p_extend = (canfd_extended_cfg_t *) p_cfg->p_extend; in R_CANFD_Open()
211 …FSP_ERROR_RETURN(r_canfd_bit_timing_parameter_check(p_cfg->p_bit_timing, false), FSP_ERR_CAN_INIT_… in R_CANFD_Open()
220 can_bit_timing_cfg_t * p_bit_timing = p_cfg->p_bit_timing; in R_CANFD_Open()
230 uint32_t channel = p_cfg->channel; in R_CANFD_Open()
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