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Searched refs:ip (Results 1 – 6 of 6) sorted by relevance

/hal_renesas-latest/zephyr/rz/portable/rzg/
Dfsp_features.h41 #define R_BSP_MODULE_START(ip, ch) (R_BSP_MODULE_START_ ## ip(ip, ch)) argument
49 #define R_BSP_MODULE_STOP(ip, ch) (R_BSP_MODULE_STOP_ ## ip(ip, ch)) argument
55 #define R_BSP_MODULE_START_FSP_IP_GTM(ip, ch) {R_BSP_MODULE_CLKON(ip, ch); \ argument
56 R_BSP_MSTP_START(ip, ch); \
57 R_BSP_MODULE_RSTON(ip, ch); \
58 R_BSP_MODULE_RSTOFF(ip, ch);}
60 #define R_BSP_MODULE_STOP_FSP_IP_GTM(ip, ch) {R_BSP_MSTP_STOP(ip, ch); \ argument
61 R_BSP_MODULE_CLKOFF(ip, ch);}
63 #define R_BSP_MODULE_START_FSP_IP_MTU3(ip, ch) {R_BSP_MODULE_CLKON(ip, ch); \ argument
64 R_BSP_MSTP_START(ip, ch); \
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/hal_renesas-latest/drivers/rz/fsp/src/rzg/bsp/mcu/all/
Dbsp_clocks.h29 #define R_BSP_MODULE_CLKON(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
31 … BSP_CLKON_REG_ ## ip(channel) = 0x00000000U \
32 … | (BSP_CLKON_BIT_ ## ip(channel) << \
34 … | (BSP_CLKON_BIT_ ## ip(channel)); \
35 … while ((BSP_CLKMON_REG_ ## ip(channel) & \
36 … BSP_CLKMON_BIT_ ## ip(channel)) == 0U) \
46 #define R_BSP_MODULE_CLKOFF(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
48 … BSP_CLKON_REG_ ## ip(channel) = 0x00000000U \
49 … | (BSP_CLKON_BIT_ ## ip(channel) << \
51 … while ((BSP_CLKMON_REG_ ## ip(channel) & \
[all …]
Dbsp_module_stop.h28 #define R_BSP_MSTP_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
30 … BSP_MSTP_REG_ ## ip(channel) = 0x00000000U \
31 … | (BSP_MSTP_BIT_ ## ip(channel) << 16U); \
32 … BSP_MSTP_REG_ ## ip(channel); \
41 #define R_BSP_MSTP_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
43 … BSP_MSTP_REG_ ## ip(channel) = 0x0000FFFFU \
44 … | (BSP_MSTP_BIT_ ## ip(channel) << 16U); \
45 … BSP_MSTP_REG_ ## ip(channel); \
Dbsp_security.h33 #define R_BSP_ACCESS_CONTROL_SET(ip, level) {BSP_ACCESS_CONTROL_REG_ ## ip = (BSP_ACCESS_CONTROL… argument
35 … BSP_ACCESS_CONTROL_POS_ ## ip)) \
37 … BSP_ACCESS_CONTROL_POS_ ## ip); \
/hal_renesas-latest/drivers/ra/fsp/src/bsp/mcu/all/
Dbsp_module_stop.h35 …#define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
37 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
38 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
43 …#define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; …
45 … BSP_MSTP_REG_ ## ip(channel) &= \
46 … (BSP_MSTP_REG_TYPE_ ## ip(channel)) ~BSP_MSTP_BIT_ ## ip(channel); \
47 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
58 …#define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
60 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
61 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
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/hal_renesas-latest/drivers/rz/fsp/src/rzn/bsp/mcu/all/
Dbsp_module_stop.h32 #define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
34 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
35 … BSP_MSTP_REG_ ## ip(channel); \
36 … BSP_MSTP_DMY_ ## ip(channel); \
37 … BSP_MSTP_DMY_ ## ip(channel); \
38 … BSP_MSTP_DMY_ ## ip(channel); \
39 … BSP_MSTP_DMY_ ## ip(channel); \
40 … BSP_MSTP_DMY_ ## ip(channel); \
49 #define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
51 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
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