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Searched refs:R_SYSC_S (Results 1 – 5 of 5) sorted by relevance

/hal_renesas-latest/drivers/rz/fsp/src/rzn/bsp/mcu/all/
Dbsp_clocks.c266 uint32_t devselsub = R_SYSC_S->SCKCR2_b.DIVSELSUB; in SystemCoreClockUpdate()
267 uint32_t fselcpu = R_SYSC_S->SCKCR2_b.FSELCPU0; in SystemCoreClockUpdate()
281 uint32_t cr52cpu = R_SYSC_S->SCKCR2_b.CR52CPU0; in SystemCoreClockUpdate()
283 uint32_t cr52cpu = R_SYSC_S->SCKCR2_b.CR52CPU1; in SystemCoreClockUpdate()
288 uint32_t ca55core = R_SYSC_S->SCKCR2_b.CA55CORE0; in SystemCoreClockUpdate()
290 uint32_t ca55core = R_SYSC_S->SCKCR2_b.CA55CORE1; in SystemCoreClockUpdate()
292 uint32_t ca55core = R_SYSC_S->SCKCR2_b.CA55CORE2; in SystemCoreClockUpdate()
294 uint32_t ca55core = R_SYSC_S->SCKCR2_b.CA55CORE3; in SystemCoreClockUpdate()
324 R_SYSC_S->SCKCR2 = sckcr2; in bsp_prv_clock_set()
329 dummy = R_SYSC_S->SCKCR2; in bsp_prv_clock_set()
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Dbsp_reset.c47 R_SYSC_S->SWRSYS = BSP_PRV_RESET_KEY; in R_BSP_SystemReset()
64 R_SYSC_S->SWRCPU0 = BSP_PRV_RESET_KEY; in R_BSP_CPUReset()
77 R_SYSC_S->SWRCPU1 = BSP_PRV_RESET_KEY; in R_BSP_CPUReset()
90 R_SYSC_S->SWR55C = BSP_PRV_RESET_KEY; in R_BSP_CPUReset()
114 R_SYSC_S->SWRCPU0 = BSP_PRV_RESET_KEY_AUTO_RELEASE; in R_BSP_CPUResetAutoRelease()
127 R_SYSC_S->SWRCPU1 = BSP_PRV_RESET_KEY_AUTO_RELEASE; in R_BSP_CPUResetAutoRelease()
140 R_SYSC_S->SWR55C = BSP_PRV_RESET_KEY_AUTO_RELEASE; in R_BSP_CPUResetAutoRelease()
221 R_SYSC_S->SWRCPU0 = BSP_PRV_RESET_RELEASE_KEY; in R_BSP_CPUResetRelease()
228 R_SYSC_S->SWRCPU1 = BSP_PRV_RESET_RELEASE_KEY; in R_BSP_CPUResetRelease()
235 R_SYSC_S->SWR55C = BSP_PRV_RESET_RELEASE_KEY; in R_BSP_CPUResetRelease()
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Dbsp_module_stop.h65 …TP_REG_FSP_IP_SCI(channel) *((4U >= channel) ? &R_SYSC_NS->MSTPCRA : &R_SYSC_S->MSTPCRG)
100 …TP_REG_FSP_IP_IIC(channel) *((1U >= channel) ? &R_SYSC_NS->MSTPCRB : &R_SYSC_S->MSTPCRG)
105 …TP_REG_FSP_IP_SPI(channel) *((2U >= channel) ? &R_SYSC_NS->MSTPCRB : &R_SYSC_S->MSTPCRG)
118 …TP_REG_FSP_IP_GPT(channel) *((13U >= channel) ? &R_SYSC_NS->MSTPCRC : &R_SYSC_S->MSTPCRG)
126 …TP_REG_FSP_IP_GPT(channel) *((51U >= channel) ? &R_SYSC_NS->MSTPCRC : &R_SYSC_S->MSTPCRG)
220 …TP_REG_FSP_IP_CRC(channel) *((0U == channel) ? &R_SYSC_NS->MSTPCRD : &R_SYSC_S->MSTPCRG)
263 #define BSP_MSTP_REG_FSP_IP_TRACECLOCK(channel) R_SYSC_S->MSTPCRF
268 #define BSP_MSTP_REG_FSP_IP_RTC(channel) R_SYSC_S->MSTPCRG
273 #define BSP_MSTP_REG_FSP_IP_CLMA(channel) R_SYSC_S->MSTPCRG
286 #define BSP_MSTP_REG_FSP_IP_CLMA(channel) R_SYSC_S->MSTPCRG
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/hal_renesas-latest/zephyr/rz/portable/rzn/
Dbsp_common.h353 uint32_t fselcpu0 = R_SYSC_S->SCKCR2_b.FSELCPU0; in R_FSP_SystemClockHzGet()
354 uint32_t divselsub = R_SYSC_S->SCKCR2_b.DIVSELSUB; in R_FSP_SystemClockHzGet()
356 uint32_t cr52cpu0 = R_SYSC_S->SCKCR2_b.CR52CPU0; in R_FSP_SystemClockHzGet()
357 uint32_t cr52cpu1 = R_SYSC_S->SCKCR2_b.CR52CPU1; in R_FSP_SystemClockHzGet()
383 uint32_t ca55core0 = R_SYSC_S->SCKCR2_b.CA55CORE0; in R_FSP_SystemClockHzGet()
390 uint32_t ca55core1 = R_SYSC_S->SCKCR2_b.CA55CORE1; in R_FSP_SystemClockHzGet()
397 uint32_t ca55core2 = R_SYSC_S->SCKCR2_b.CA55CORE2; in R_FSP_SystemClockHzGet()
404 uint32_t ca55core3 = R_SYSC_S->SCKCR2_b.CA55CORE3; in R_FSP_SystemClockHzGet()
411 uint32_t ca55sclk = R_SYSC_S->SCKCR2_b.CA55SCLK; in R_FSP_SystemClockHzGet()
507 clock_hz = g_bsp_system_clock_select_spi_clk[R_SYSC_S->SCKCR2_b.SPI3ASYNCSEL]; in R_FSP_SystemClockHzGet()
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/hal_renesas-latest/drivers/rz/fsp/src/rzn/bsp/cmsis/Device/RENESAS/Include/
DR9A07G084.h30868 #define R_SYSC_S ((R_SYSC_S_Type *) R_SYSC_S_BASE) macro