Searched refs:R_CLMA0 (Results 1 – 3 of 3) sorted by relevance
583 R_CLMA0->CMPL = BSP_CFG_CLMA0_CMPL; in bsp_clock_init()584 R_CLMA0->CMPH = BSP_CFG_CLMA0_CMPH; in bsp_clock_init()589 R_CLMA0->PCMD = BSP_PRV_PCMD_KEY; in bsp_clock_init()591 R_CLMA0->CTL0 = BSP_PRV_CTL0_ENABLE_TARGET_CMD; in bsp_clock_init()592 R_CLMA0->CTL0 = BSP_PRV_CTL0_ENABLE_REVERSED_CMD; in bsp_clock_init()593 R_CLMA0->CTL0 = BSP_PRV_CTL0_ENABLE_TARGET_CMD; in bsp_clock_init()595 if (1 != R_CLMA0->CTL0) in bsp_clock_init()598 dummy = R_CLMA0->PROTSR; in bsp_clock_init()600 } while (1 == R_CLMA0->PROTSR_b.PRERR); in bsp_clock_init()
277 … channel) ? R_CLMA0->CTL0 : ((1 >= \289 #define BSP_MSTP_DMY_FSP_IP_CLMA(channel) ((0 >= channel) ? R_CLMA0->CTL0 : \
30869 #define R_CLMA0 ((R_CLMA0_Type *) R_CLMA0_BASE) macro
