Searched refs:BSP_CLOCKS_PLL2_NORMAL (Results 1 – 3 of 3) sorted by relevance
101 #if ((BSP_CLOCKS_PLL2_NORMAL != BSP_CFG_PLL2) && (1 == BSP_CFG_DDR_INIT_ENABLE))
290 #define BSP_CLOCKS_PLL2_NORMAL (1) // PLL2 is normal state. macro
524 if (BSP_CLOCKS_PLL2_NORMAL == BSP_CFG_PLL2) in bsp_clock_init()
