Searched refs:BSP_CFG_SPI3ASYNCCLK (Results 1 – 2 of 2) sorted by relevance
43 #define BSP_CFG_SPI3ASYNCCLK (BSP_CLOCKS_SPI3_ASYNCHRONOUS_SERIAL_CLOCK_96_MHZ) /* SPI3ASYNCCLK: 96… macro
59 #define BSP_PRV_STARTUP_SCKCR2_SPI3ASYNCSEL_BITS ((BSP_CFG_SPI3ASYNCCLK & 1U) << 24U)69 #define BSP_PRV_STARTUP_SCKCR2_SPI3ASYNCSEL_BITS ((BSP_CFG_SPI3ASYNCCLK & 3U) << 16U)