Searched refs:BSP_CFG_SPI1ASYNCCLK (Results 1 – 2 of 2) sorted by relevance
41 #define BSP_CFG_SPI1ASYNCCLK (BSP_CLOCKS_SPI1_ASYNCHRONOUS_SERIAL_CLOCK_96_MHZ) /* SPI1ASYNCCLK: 96… macro
33 #define BSP_PRV_STARTUP_SCKCR_SPI1ASYNCSEL_BITS ((BSP_CFG_SPI1ASYNCCLK & 1U) << 25U)76 #define BSP_PRV_STARTUP_SCKCR3_SPI1ASYNCSEL_BITS ((BSP_CFG_SPI1ASYNCCLK & 3U) << 2U)
