| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m1/ |
| D | bsp_mcu_family_cfg.h | 39 #define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) | (1 << 8)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4m1/ |
| D | bsp_mcu_family_cfg.h | 38 #define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEC3 | (1 << 2) | (3 << 3) | (0 << 8)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4w1/ |
| D | bsp_mcu_family_cfg.h | 40 #define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEC3 | (1 << 2) | (3 << 3) | (0 << 8)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra2a1/ |
| D | bsp_mcu_family_cfg.h | 42 #define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEC3 | (1 << 2) | (3 << 3) | (0 << 8)) macro
|
| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra2l1/ |
| D | bsp_mcu_family_cfg.h | 41 #define BSP_CFG_ROM_REG_OFS1 (0x7FFFFEC3 | (1 << 2) | (3 << 3) | (0 << 8) | \ macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m2/ |
| D | bsp_mcu_family_cfg.h | 39 #define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) | (1 << 8)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m3/ |
| D | bsp_mcu_family_cfg.h | 39 #define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) | (1 << 8)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6e2/ |
| D | bsp_mcu_family_cfg.h | 290 #define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) | (1 << 8)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4e2/ |
| D | bsp_mcu_family_cfg.h | 300 #define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) | (1 << 8)) macro
|
| /hal_renesas-latest/drivers/ra/fsp/src/bsp/mcu/all/ |
| D | bsp_rom_registers.c | 19 (((uint32_t) BSP_CFG_ROM_REG_OFS1 & BSP_FEATURE_BSP_OFS1_HOCOFRQ_MASK) | \
|
| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4e1/ |
| D | bsp_mcu_family_cfg.h | 313 #define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) | (0 << 8)) macro
|
| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4l1/ |
| D | bsp_mcu_family_cfg.h | 306 #define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (2) | (1 << 8)) macro
|
| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4m2/ |
| D | bsp_mcu_family_cfg.h | 329 #define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) | (1 << 8)) macro
|
| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4m3/ |
| D | bsp_mcu_family_cfg.h | 330 #define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) | (1 << 8)) macro
|
| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6e1/ |
| D | bsp_mcu_family_cfg.h | 313 #define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) | (1 << 8)) macro
|
| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m4/ |
| D | bsp_mcu_family_cfg.h | 313 #define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) | (1 << 8)) macro
|
| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m5/ |
| D | bsp_mcu_family_cfg.h | 313 #define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) | (1 << 8)) macro
|
| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra8t1/ |
| D | bsp_mcu_family_cfg.h | 352 #define BSP_CFG_ROM_REG_OFS1 \ macro
|
| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra8d1/ |
| D | bsp_mcu_family_cfg.h | 357 #define BSP_CFG_ROM_REG_OFS1 \ macro
|
| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra8m1/ |
| D | bsp_mcu_family_cfg.h | 346 #define BSP_CFG_ROM_REG_OFS1 (0xFCFFFED0 | (1 << 3) | (7) | (1 << 5) | (1 << 8) | (1 << 24) | (BSP… macro
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