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Searched refs:__ASM (Results 1 – 4 of 4) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/RISCV/
Dcore_riscv32.h46 …#define __ASM __asm /*!< asm keyword for GNU Compi… macro
56 #define __BKPT(x) __ASM("ebreak")
60 __ASM volatile ("nop"); in __NOP()
65 __ASM volatile ("nop"); in __DSB()
70 __ASM volatile ("nop"); in __ISB()
75 __ASM volatile ("wfi"); in __WFI()
84 __ASM volatile ("csrsi mstatus, 8"); in __enable_irq()
89 __ASM volatile ("csrci mstatus, 8"); in __disable_irq()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_common.h409 __ASM volatile ("csrrci %0, mstatus, 8" : "=r"(mstatus)); in DisableGlobalIRQ()
434 __ASM volatile ("csrw mstatus, %0" : : "r"(primask)); in EnableGlobalIRQ()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
Dsystem_RV32M1_zero_riscy.c377 __ASM volatile("csrw 0x305, %0" :: "r"((uint32_t)__VECTOR_TABLE)); /* MTVEC */ in SystemInit()
378 __ASM volatile("csrw 0x005, %0" :: "r"((uint32_t)__VECTOR_TABLE)); /* UTVEC */ in SystemInit()
Dsystem_RV32M1_ri5cy.c374 __ASM volatile("csrw 0x305, %0" :: "r"((uint32_t)__VECTOR_TABLE)); /* MTVEC */ in SystemInit()
375 __ASM volatile("csrw 0x005, %0" :: "r"((uint32_t)__VECTOR_TABLE)); /* UTVEC */ in SystemInit()