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Searched refs:SCG_SIRCCFG_RANGE_SHIFT (Results 1 – 5 of 5) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
Dsystem_RV32M1_zero_riscy.c404 …SCGOUTClock = (((SCG->SIRCCFG & SCG_SIRCCFG_RANGE_MASK) >> SCG_SIRCCFG_RANGE_SHIFT) ? 8000000 : 20… in SystemCoreClockUpdate()
Dsystem_RV32M1_ri5cy.c401 …SCGOUTClock = (((SCG->SIRCCFG & SCG_SIRCCFG_RANGE_MASK) >> SCG_SIRCCFG_RANGE_SHIFT) ? 8000000 : 20… in SystemCoreClockUpdate()
DRV32M1_ri5cy.h16875 #define SCG_SIRCCFG_RANGE_SHIFT (0U) macro
16880 …CFG_RANGE(x) (((uint32_t)(((uint32_t)(x)) << SCG_SIRCCFG_RANGE_SHIFT)) & SCG_S…
DRV32M1_zero_riscy.h17703 #define SCG_SIRCCFG_RANGE_SHIFT (0U) macro
17708 …CFG_RANGE(x) (((uint32_t)(((uint32_t)(x)) << SCG_SIRCCFG_RANGE_SHIFT)) & SCG_S…
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_clock.c44 #define SCG_SIRCCFG_RANGE_VAL ((SCG->SIRCCFG & SCG_SIRCCFG_RANGE_MASK) >> SCG_SIRCCFG_RANGE_SHIFT)