Home
last modified time | relevance | path

Searched refs:LPIT_MCR_DBG_EN_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
Dsystem_RV32M1_zero_riscy.c477 SYSTICK_LPIT->MCR = LPIT_MCR_DBG_EN_MASK | LPIT_MCR_DOZE_EN_MASK | LPIT_MCR_M_CEN_MASK;
Dsystem_RV32M1_ri5cy.c474 SYSTICK_LPIT->MCR = LPIT_MCR_DBG_EN_MASK | LPIT_MCR_DOZE_EN_MASK | LPIT_MCR_M_CEN_MASK;
DRV32M1_ri5cy.h11268 #define LPIT_MCR_DBG_EN_MASK (0x8U) macro
11274 … (((uint32_t)(((uint32_t)(x)) << LPIT_MCR_DBG_EN_SHIFT)) & LPIT_MCR_DBG_EN_MASK)
DRV32M1_zero_riscy.h11412 #define LPIT_MCR_DBG_EN_MASK (0x8U) macro
11418 … (((uint32_t)(((uint32_t)(x)) << LPIT_MCR_DBG_EN_SHIFT)) & LPIT_MCR_DBG_EN_MASK)