| /hal_nxp-latest/mcux/mcux-sdk/devices/MKW40Z4/ |
| D | MKW40Z4_extension.h | 146 #define ADC_WR_SC1(base, index, value) (ADC_SC1_REG(base, index) = (value)) argument
147 …define ADC_RMW_SC1(base, index, mask, value) (ADC_WR_SC1(base, index, (ADC_RD_SC1(base, index) & ~… argument
148 #define ADC_SET_SC1(base, index, value) (BME_OR32(&ADC_SC1_REG(base, index), (uint32_t)(value))) argument
149 #define ADC_CLR_SC1(base, index, value) (BME_AND32(&ADC_SC1_REG(base, index), (uint32_t)(~(value)))) argument
150 #define ADC_TOG_SC1(base, index, value) (BME_XOR32(&ADC_SC1_REG(base, index), (uint32_t)(value))) argument
242 #define ADC_WR_SC1_ADCH(base, index, value) (ADC_RMW_SC1(base, index, ADC_SC1_ADCH_MASK, ADC_SC1_AD… argument
243 #define ADC_BWR_SC1_ADCH(base, index, value) (BME_BFI32(&ADC_SC1_REG(base, index), ((uint32_t)(valu… argument
263 #define ADC_WR_SC1_DIFF(base, index, value) (ADC_RMW_SC1(base, index, ADC_SC1_DIFF_MASK, ADC_SC1_DI… argument
264 #define ADC_BWR_SC1_DIFF(base, index, value) (BME_BFI32(&ADC_SC1_REG(base, index), ((uint32_t)(valu… argument
283 #define ADC_WR_SC1_AIEN(base, index, value) (ADC_RMW_SC1(base, index, ADC_SC1_AIEN_MASK, ADC_SC1_AI… argument
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| /hal_nxp-latest/mcux/mcux-sdk/components/video/display/it6161/ |
| D | mipi_rx.c | 27 uint8_t value = 0U; in MIPIRX_DumpRegs() local
47 MIPIRX_ReadI2C_Byte(handle, ((i + j) & 0xFF), &value); in MIPIRX_DumpRegs()
48 PRINTF(" %02X", value); in MIPIRX_DumpRegs()
129 uint8_t value = 0U; in MIPIRX_CalMclk() local
137 MIPIRX_ReadI2C_Byte(handle, 0x9A, &value); in MIPIRX_CalMclk()
138 rddata = value; in MIPIRX_CalMclk()
139 MIPIRX_ReadI2C_Byte(handle, 0x9B, &value); in MIPIRX_CalMclk()
140 rddata = (((uint32_t)value & 0x0FU) << 8) + rddata; in MIPIRX_CalMclk()
157 uint8_t value = 0U; in MIPIRX_CalPclk() local
166 MIPIRX_ReadI2C_Byte(handle, 0x98, &value); in MIPIRX_CalPclk()
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| D | hdmi_tx.c | 70 static inline void HDMITX_ChangeBank(display_handle_t *handle, uint8_t value) in HDMITX_ChangeBank() argument
72 HDMITX_SetI2C_Byte(handle, 0x0F, 0x03, (uint32_t)value & 0x03U); in HDMITX_ChangeBank()
207 uint8_t value = 0U; in getHDMITX_EDIDBytes() local
213 HDMITX_ReadI2C_Byte(handle, HDMI_TX_INT_FLAGS_REG06, &value); in getHDMITX_EDIDBytes()
214 if ((value & HDMI_TX_INT_FLAGS_REG06_RInt_DDCBusHang_MASK) != 0U) in getHDMITX_EDIDBytes()
237 HDMITX_ReadI2C_Byte(handle, HDMI_TX_SYS_DDC_CTRL_REG16, &value); in getHDMITX_EDIDBytes()
238 if ((value & HDMI_TX_SYS_DDC_CTRL_REG16_RDDC_Status_Done_MASK) != 0U) in getHDMITX_EDIDBytes()
243 if ((value & (HDMI_TX_SYS_DDC_CTRL_REG16_RDDC_Status_NoACK_MASK | in getHDMITX_EDIDBytes()
520 uint8_t value = 0U; in HDMITX_GetVideoState() local
522 HDMITX_ReadI2C_Byte(handle, HDMI_TX_SYS_STATUS_REG0E, &value); in HDMITX_GetVideoState()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/trng/ |
| D | fsl_trng.c | 181 #define TRNG_WR_SCMISC_RTY_CT(base, value) (TRNG_RMW_SCMISC(base, TRNG_SCMISC_RTY_CT_MASK, TRNG_SCM… argument
208 #define TRNG_WR_SCML(base, value) (TRNG_SCML_REG(base) = (value)) argument
209 #define TRNG_RMW_SCML(base, mask, value) (TRNG_WR_SCML(base, (TRNG_RD_SCML(base) & ~(mask)) | (valu… argument
224 #define TRNG_WR_SCML_MONO_MAX(base, value) (TRNG_RMW_SCML(base, TRNG_SCML_MONO_MAX_MASK, TRNG_SCML_… argument
239 #define TRNG_WR_SCML_MONO_RNG(base, value) (TRNG_RMW_SCML(base, TRNG_SCML_MONO_RNG_MASK, TRNG_SCML_… argument
268 #define TRNG_WR_SCR1L(base, value) (TRNG_SCR1L_REG(base) = (value)) argument
269 #define TRNG_RMW_SCR1L(base, mask, value) (TRNG_WR_SCR1L(base, (TRNG_RD_SCR1L(base) & ~(mask)) | (v… argument
286 …define TRNG_WR_SCR1L_RUN1_MAX(base, value) (TRNG_RMW_SCR1L(base, TRNG_SCR1L_RUN1_MAX_MASK, TRNG_SC… argument
302 …define TRNG_WR_SCR1L_RUN1_RNG(base, value) (TRNG_RMW_SCR1L(base, TRNG_SCR1L_RUN1_RNG_MASK, TRNG_SC… argument
331 #define TRNG_WR_SCR2L(base, value) (TRNG_SCR2L_REG(base) = (value)) argument
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| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/Include/ |
| D | cmsis_iccarm.h | 586 __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr) in __STREXW() argument
588 return __STREX(value, (unsigned long *)ptr); in __STREXW()
596 __IAR_FT uint32_t __RRX(uint32_t value) in __RRX() argument
599 __ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc"); in __RRX()
603 __IAR_FT void __set_BASEPRI_MAX(uint32_t value) in __set_BASEPRI_MAX() argument
605 __asm volatile("MSR BASEPRI_MAX,%0"::"r" (value)); in __set_BASEPRI_MAX()
636 __IAR_FT void __set_MSPLIM(uint32_t value) in __set_MSPLIM() argument
641 (void)value; in __set_MSPLIM()
643 __asm volatile("MSR MSPLIM,%0" :: "r" (value)); in __set_MSPLIM()
660 __IAR_FT void __set_PSPLIM(uint32_t value) in __set_PSPLIM() argument
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| D | cmsis_armcc.h | 492 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value) in __REV16() argument
507 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value) in __REVSH() argument
532 #define __BKPT(value) __breakpoint(value) argument
545 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) in __RBIT() argument
550 result = value; /* r will be reversed bits of v; first get LSB of v */ in __RBIT()
551 for (value >>= 1U; value != 0U; value >>= 1U) in __RBIT()
554 result |= value & 1U; in __RBIT()
623 #define __STREXB(value, ptr) __strex(value, ptr) argument
625 …#define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) … argument
638 #define __STREXH(value, ptr) __strex(value, ptr) argument
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| D | cmsis_gcc.h | 967 __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) in __REV() argument
970 return __builtin_bswap32(value); in __REV()
974 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); in __REV()
986 __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) in __REV16() argument
990 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); in __REV16()
1001 __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) in __REVSH() argument
1004 return (int16_t)__builtin_bswap16(value); in __REVSH()
1008 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); in __REVSH()
1039 #define __BKPT(value) __ASM volatile ("bkpt "#value) argument
1048 __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) in __RBIT() argument
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| D | cmsis_armclang.h | 874 #define __REV(value) __builtin_bswap32(value) argument
883 #define __REV16(value) __ROR(__REV(value), 16) argument
892 #define __REVSH(value) (int16_t)__builtin_bswap16(value) argument
920 #define __BKPT(value) __ASM volatile ("bkpt "#value) argument
937 __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) in __CLZ() argument
948 if (value == 0U) in __CLZ()
952 return __builtin_clz(value); in __CLZ()
1063 __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value) in __RRX() argument
1067 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); in __RRX()
1123 __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) in __STRBT() argument
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| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/Core/Include/ |
| D | cmsis_iccarm.h | 619 __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr) in __STREXW() argument
621 return __STREX(value, (unsigned long *)ptr); in __STREXW()
629 __IAR_FT uint32_t __RRX(uint32_t value) in __RRX() argument
632 __ASM volatile("RRX %0, %1" : "=r"(result) : "r" (value)); in __RRX()
636 __IAR_FT void __set_BASEPRI_MAX(uint32_t value) in __set_BASEPRI_MAX() argument
638 __asm volatile("MSR BASEPRI_MAX,%0"::"r" (value)); in __set_BASEPRI_MAX()
669 __IAR_FT void __set_MSPLIM(uint32_t value) in __set_MSPLIM() argument
674 (void)value; in __set_MSPLIM()
676 __asm volatile("MSR MSPLIM,%0" :: "r" (value)); in __set_MSPLIM()
693 __IAR_FT void __set_PSPLIM(uint32_t value) in __set_PSPLIM() argument
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| D | cmsis_armcc.h | 208 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value) in __REV16() argument
223 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value) in __REVSH() argument
248 #define __BKPT(value) __breakpoint(value) argument
261 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) in __RBIT() argument
266 result = value; /* r will be reversed bits of v; first get LSB of v */ in __RBIT()
267 for (value >>= 1U; value != 0U; value >>= 1U) in __RBIT()
270 result |= value & 1U; in __RBIT()
339 #define __STREXB(value, ptr) __strex(value, ptr) argument
341 …#define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) … argument
354 #define __STREXH(value, ptr) __strex(value, ptr) argument
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| D | cmsis_gcc.h | 292 __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) in __REV() argument
295 return __builtin_bswap32(value); in __REV()
299 __ASM ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); in __REV()
311 __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) in __REV16() argument
315 __ASM ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); in __REV16()
326 __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) in __REVSH() argument
329 return (int16_t)__builtin_bswap16(value); in __REVSH()
333 __ASM ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); in __REVSH()
364 #define __BKPT(value) __ASM volatile ("bkpt "#value) argument
373 __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) in __RBIT() argument
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| D | cmsis_armclang.h | 232 #define __REV(value) __builtin_bswap32(value) argument
241 #define __REV16(value) __ROR(__REV(value), 16) argument
250 #define __REVSH(value) (int16_t)__builtin_bswap16(value) argument
278 #define __BKPT(value) __ASM volatile ("bkpt "#value) argument
295 __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) in __CLZ() argument
306 if (value == 0U) in __CLZ()
310 return __builtin_clz(value); in __CLZ()
425 __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value) in __RRX() argument
429 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); in __RRX()
485 __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) in __STRBT() argument
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/aoi/ |
| D | fsl_aoi.c | 125 uint16_t value; in AOI_GetEventLogicConfig() local
128 value = base->BFCRT[event].BFCRT01; in AOI_GetEventLogicConfig()
130 temp = (value & AOI_BFCRT01_PT0_AC_MASK) >> AOI_BFCRT01_PT0_AC_SHIFT; in AOI_GetEventLogicConfig()
132 temp = (value & AOI_BFCRT01_PT0_BC_MASK) >> AOI_BFCRT01_PT0_BC_SHIFT; in AOI_GetEventLogicConfig()
134 temp = (value & AOI_BFCRT01_PT0_CC_MASK) >> AOI_BFCRT01_PT0_CC_SHIFT; in AOI_GetEventLogicConfig()
136 temp = (value & AOI_BFCRT01_PT0_DC_MASK) >> AOI_BFCRT01_PT0_DC_SHIFT; in AOI_GetEventLogicConfig()
139 temp = (value & AOI_BFCRT01_PT1_AC_MASK) >> AOI_BFCRT01_PT1_AC_SHIFT; in AOI_GetEventLogicConfig()
141 temp = (value & AOI_BFCRT01_PT1_BC_MASK) >> AOI_BFCRT01_PT1_BC_SHIFT; in AOI_GetEventLogicConfig()
143 temp = (value & AOI_BFCRT01_PT1_CC_MASK) >> AOI_BFCRT01_PT1_CC_SHIFT; in AOI_GetEventLogicConfig()
145 temp = (value & AOI_BFCRT01_PT1_DC_MASK) >> AOI_BFCRT01_PT1_DC_SHIFT; in AOI_GetEventLogicConfig()
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| /hal_nxp-latest/s32/drivers/s32ze/BaseNXP/include/ |
| D | RegLockMacros.h | 70 #define RLM_REG_WRITE8(address, value) ((*(volatile uint8*)(address))= (value)) argument
74 #define RLM_REG_WRITE16(address, value) ((*(volatile uint16*)(address))= (value)) argument
78 #define RLM_REG_WRITE32(address, value) ((*(volatile uint32*)(address))= (value)) argument
141 …ine RLM_REG_RMW8(address, mask, value) (RLM_REG_WRITE8((address), ((RLM_REG_READ8(address)& ((u… argument
147 …e RLM_REG_RMW16(address, mask, value) (RLM_REG_WRITE16((address), ((RLM_REG_READ16(address)& ((u… argument
153 …e RLM_REG_RMW32(address, mask, value) (RLM_REG_WRITE32((address), ((RLM_REG_READ32(address)& ((u… argument
674 #define REG_WRITE_LOCK8(baseAddr, regAddr, prot_mem, value) \ argument
677 RLM_REG_WRITE8(((regAddr) + ((prot_mem) * MIRRORED_ADDR_OFFSET_U32)), (value)); \
681 #define REG_WRITE_LOCK8(baseAddr, regAddr, prot_mem, value) \
682 RLM_REG_WRITE8((regAddr), (value))
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| /hal_nxp-latest/s32/drivers/s32k1/BaseNXP/include/ |
| D | RegLockMacros.h | 69 #define RLM_REG_WRITE8(address, value) ((*(volatile uint8*)(address))= (value)) argument
73 #define RLM_REG_WRITE16(address, value) ((*(volatile uint16*)(address))= (value)) argument
77 #define RLM_REG_WRITE32(address, value) ((*(volatile uint32*)(address))= (value)) argument
140 …ine RLM_REG_RMW8(address, mask, value) (RLM_REG_WRITE8((address), ((RLM_REG_READ8(address)& ((u… argument
146 …e RLM_REG_RMW16(address, mask, value) (RLM_REG_WRITE16((address), ((RLM_REG_READ16(address)& ((u… argument
152 …e RLM_REG_RMW32(address, mask, value) (RLM_REG_WRITE32((address), ((RLM_REG_READ32(address)& ((u… argument
673 #define REG_WRITE_LOCK8(baseAddr, regAddr, prot_mem, value) \ argument
676 RLM_REG_WRITE8(((regAddr) + ((prot_mem) * MIRRORED_ADDR_OFFSET_U32)), (value)); \
680 #define REG_WRITE_LOCK8(baseAddr, regAddr, prot_mem, value) \
681 RLM_REG_WRITE8((regAddr), (value))
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| /hal_nxp-latest/s32/drivers/s32k3/BaseNXP/include/ |
| D | RegLockMacros.h | 70 #define RLM_REG_WRITE8(address, value) ((*(volatile uint8*)(address))= (value)) argument
74 #define RLM_REG_WRITE16(address, value) ((*(volatile uint16*)(address))= (value)) argument
78 #define RLM_REG_WRITE32(address, value) ((*(volatile uint32*)(address))= (value)) argument
141 …ine RLM_REG_RMW8(address, mask, value) (RLM_REG_WRITE8((address), ((RLM_REG_READ8(address)& ((u… argument
147 …e RLM_REG_RMW16(address, mask, value) (RLM_REG_WRITE16((address), ((RLM_REG_READ16(address)& ((u… argument
153 …e RLM_REG_RMW32(address, mask, value) (RLM_REG_WRITE32((address), ((RLM_REG_READ32(address)& ((u… argument
674 #define REG_WRITE_LOCK8(baseAddr, regAddr, prot_mem, value) \ argument
677 RLM_REG_WRITE8(((regAddr) + ((prot_mem) * MIRRORED_ADDR_OFFSET_U32)), (value)); \
681 #define REG_WRITE_LOCK8(baseAddr, regAddr, prot_mem, value) \
682 RLM_REG_WRITE8((regAddr), (value))
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| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/DSP/Source/SupportFunctions/ |
| D | arm_fill_f32.c | 61 float32_t value, in arm_fill_f32() argument
72 vstrwq_f32(pDst,vdupq_n_f32(value)); in arm_fill_f32()
88 *pDst++ = value; in arm_fill_f32()
98 float32_t value, in arm_fill_f32() argument
105 float32x4_t inV = vdupq_n_f32(value); in arm_fill_f32()
130 *pDst++ = value; in arm_fill_f32()
138 float32_t value, in arm_fill_f32() argument
154 *pDst++ = value; in arm_fill_f32()
155 *pDst++ = value; in arm_fill_f32()
156 *pDst++ = value; in arm_fill_f32()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/pmu/ |
| D | fsl_pmu.h | 171 static inline void PMU_1P1SetRegulatorOutputVoltage(PMU_Type *base, uint32_t value) in PMU_1P1SetRegulatorOutputVoltage() argument
173 base->REG_1P1 = (base->REG_1P1 & ~PMU_REG_1P1_OUTPUT_TRG_MASK) | PMU_REG_1P1_OUTPUT_TRG(value); in PMU_1P1SetRegulatorOutputVoltage()
187 static inline void PMU_1P1SetBrownoutOffsetVoltage(PMU_Type *base, uint32_t value) in PMU_1P1SetBrownoutOffsetVoltage() argument
189 base->REG_1P1 = (base->REG_1P1 & ~PMU_REG_1P1_BO_OFFSET_MASK) | PMU_REG_1P1_BO_OFFSET(value); in PMU_1P1SetBrownoutOffsetVoltage()
284 static inline void PMU_3P0SetRegulatorOutputVoltage(PMU_Type *base, uint32_t value) in PMU_3P0SetRegulatorOutputVoltage() argument
286 base->REG_3P0 = (base->REG_3P0 & ~PMU_REG_3P0_OUTPUT_TRG_MASK) | PMU_REG_3P0_OUTPUT_TRG(value); in PMU_3P0SetRegulatorOutputVoltage()
314 static inline void PMU_3P0SetBrownoutOffsetVoltage(PMU_Type *base, uint32_t value) in PMU_3P0SetBrownoutOffsetVoltage() argument
316 base->REG_3P0 = (base->REG_3P0 & ~PMU_REG_3P0_BO_OFFSET_MASK) | PMU_REG_3P0_BO_OFFSET(value); in PMU_3P0SetBrownoutOffsetVoltage()
415 static inline void PMU_2P5SetRegulatorOutputVoltage(PMU_Type *base, uint32_t value) in PMU_2P5SetRegulatorOutputVoltage() argument
417 base->REG_2P5 = (base->REG_2P5 & ~PMU_REG_2P5_OUTPUT_TRG_MASK) | PMU_REG_2P5_OUTPUT_TRG(value); in PMU_2P5SetRegulatorOutputVoltage()
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| /hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-usb/otg/ |
| D | usb_otg_khci.c | 145 uint32_t value = 0; in USB_OtgKhciParsePeripheralStatus() local
177 value = 0U; in USB_OtgKhciParsePeripheralStatus()
180 value = 1U; in USB_OtgKhciParsePeripheralStatus()
182 (void)USB_OtgNotifyChange(otgKhciInstance->otgHandle, (uint32_t)kOtg_StatusId, value); in USB_OtgKhciParsePeripheralStatus()
187 value = 0U; in USB_OtgKhciParsePeripheralStatus()
190 value = 1U; in USB_OtgKhciParsePeripheralStatus()
192 (void)USB_OtgNotifyChange(otgKhciInstance->otgHandle, (uint32_t)kOtg_StatusSessVld, value); in USB_OtgKhciParsePeripheralStatus()
197 value = 0U; in USB_OtgKhciParsePeripheralStatus()
200 value = 1U; in USB_OtgKhciParsePeripheralStatus()
202 (void)USB_OtgNotifyChange(otgKhciInstance->otgHandle, (uint32_t)kOtg_StatusVbusVld, value); in USB_OtgKhciParsePeripheralStatus()
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| /hal_nxp-latest/mcux/mcux-sdk/components/codec/tfa9xxx/vas_tfa_drv/ |
| D | tfa2_dev.c | 844 uint16_t value = 0; in tfa2_dev_init() local
850 tfa2_i2c_set_bf_value(TFA9XXX_BF_I2CR, 1, &value); /* This will save an i2c reg read */ in tfa2_dev_init()
851 error = tfa2_i2c_write_reg(tfa->i2c, TFA9XXX_BF_I2CR, value); in tfa2_dev_init()
1008 int value; in tfa2_dev_cf_enabled() local
1012 value = 0; in tfa2_dev_cf_enabled()
1016 value = tfa2_i2c_read_bf(tfa->i2c, TFA9XXX_BF_CFE); in tfa2_dev_cf_enabled()
1019 return value; in tfa2_dev_cf_enabled()
1122 int value, rc; in tfa2_i2c_bf_poll() local
1132 value = tfa2_i2c_read_bf(client, bf); /* read */ in tfa2_i2c_bf_poll()
1133 while (value != wait_value && --loop); in tfa2_i2c_bf_poll()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/drivers/ |
| D | fsl_nic301.h | 159 static inline void NIC_SetReadQos(nic_reg_t base, nic_qos_t value) in NIC_SetReadQos() argument
161 *(volatile uint32_t *)(base) = (value & NIC_QOS_MASK); in NIC_SetReadQos()
182 static void inline NIC_SetWriteQos(nic_reg_t base, nic_qos_t value) in NIC_SetWriteQos() argument
184 *(volatile uint32_t *)(base) = (value & NIC_QOS_MASK); in NIC_SetWriteQos()
205 static inline void NIC_SetFnModAhb(nic_reg_t base, nic_fn_mod_ahb_t value) in NIC_SetFnModAhb() argument
207 *(volatile uint32_t *)(base) = value; in NIC_SetFnModAhb()
228 static inline void NIC_SetWrTideMark(nic_reg_t base, uint8_t value) in NIC_SetWrTideMark() argument
230 *(volatile uint32_t *)(base) = (value & NIC_WR_TIDEMARK_MASK); in NIC_SetWrTideMark()
251 static inline void NIC_SetFnMod(nic_reg_t base, nic_fn_mod_t value) in NIC_SetFnMod() argument
253 *(volatile uint32_t *)(base) = value; in NIC_SetFnMod()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/drivers/ |
| D | fsl_nic301.h | 159 static inline void NIC_SetReadQos(nic_reg_t base, nic_qos_t value) in NIC_SetReadQos() argument
161 *(volatile uint32_t *)(base) = (value & NIC_QOS_MASK); in NIC_SetReadQos()
182 static void inline NIC_SetWriteQos(nic_reg_t base, nic_qos_t value) in NIC_SetWriteQos() argument
184 *(volatile uint32_t *)(base) = (value & NIC_QOS_MASK); in NIC_SetWriteQos()
205 static inline void NIC_SetFnModAhb(nic_reg_t base, nic_fn_mod_ahb_t value) in NIC_SetFnModAhb() argument
207 *(volatile uint32_t *)(base) = value; in NIC_SetFnModAhb()
228 static inline void NIC_SetWrTideMark(nic_reg_t base, uint8_t value) in NIC_SetWrTideMark() argument
230 *(volatile uint32_t *)(base) = (value & NIC_WR_TIDEMARK_MASK); in NIC_SetWrTideMark()
251 static inline void NIC_SetFnMod(nic_reg_t base, nic_fn_mod_t value) in NIC_SetFnMod() argument
253 *(volatile uint32_t *)(base) = value; in NIC_SetFnMod()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/drivers/ |
| D | fsl_nic301.h | 159 static inline void NIC_SetReadQos(nic_reg_t base, nic_qos_t value) in NIC_SetReadQos() argument
161 *(volatile uint32_t *)(base) = (value & NIC_QOS_MASK); in NIC_SetReadQos()
182 static void inline NIC_SetWriteQos(nic_reg_t base, nic_qos_t value) in NIC_SetWriteQos() argument
184 *(volatile uint32_t *)(base) = (value & NIC_QOS_MASK); in NIC_SetWriteQos()
205 static inline void NIC_SetFnModAhb(nic_reg_t base, nic_fn_mod_ahb_t value) in NIC_SetFnModAhb() argument
207 *(volatile uint32_t *)(base) = value; in NIC_SetFnModAhb()
228 static inline void NIC_SetWrTideMark(nic_reg_t base, uint8_t value) in NIC_SetWrTideMark() argument
230 *(volatile uint32_t *)(base) = (value & NIC_WR_TIDEMARK_MASK); in NIC_SetWrTideMark()
251 static inline void NIC_SetFnMod(nic_reg_t base, nic_fn_mod_t value) in NIC_SetFnMod() argument
253 *(volatile uint32_t *)(base) = value; in NIC_SetFnMod()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/drivers/ |
| D | fsl_nic301.h | 159 static inline void NIC_SetReadQos(nic_reg_t base, nic_qos_t value) in NIC_SetReadQos() argument
161 *(volatile uint32_t *)(base) = (value & NIC_QOS_MASK); in NIC_SetReadQos()
182 static void inline NIC_SetWriteQos(nic_reg_t base, nic_qos_t value) in NIC_SetWriteQos() argument
184 *(volatile uint32_t *)(base) = (value & NIC_QOS_MASK); in NIC_SetWriteQos()
205 static inline void NIC_SetFnModAhb(nic_reg_t base, nic_fn_mod_ahb_t value) in NIC_SetFnModAhb() argument
207 *(volatile uint32_t *)(base) = value; in NIC_SetFnModAhb()
228 static inline void NIC_SetWrTideMark(nic_reg_t base, uint8_t value) in NIC_SetWrTideMark() argument
230 *(volatile uint32_t *)(base) = (value & NIC_WR_TIDEMARK_MASK); in NIC_SetWrTideMark()
251 static inline void NIC_SetFnMod(nic_reg_t base, nic_fn_mod_t value) in NIC_SetFnMod() argument
253 *(volatile uint32_t *)(base) = value; in NIC_SetFnMod()
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| /hal_nxp-latest/mcux/mcux-sdk/components/video/camera/device/mt9m114/ |
| D | fsl_mt9m114.c | 19 #define MT9M114_Write(handle, reg, size, value) … argument
20 …EO_I2C_WriteReg(MT9M114_I2C_ADDR, kVIDEO_RegAddr16Bit, (reg), (video_reg_width_t)(size), (value), \
22 #define MT9M114_Read(handle, reg, size, value) … argument
23 …DEO_I2C_ReadReg(MT9M114_I2C_ADDR, kVIDEO_RegAddr16Bit, (reg), (video_reg_width_t)(size), (value), \
25 #define MT9M114_Modify(handle, reg, size, clrMask, value) … argument
26 …yReg(MT9M114_I2C_ADDR, kVIDEO_RegAddr16Bit, (reg), (video_reg_width_t)(size), (clrMask), (value), \
34 uint32_t value; member
139 status = MT9M114_Write(handle, regs[i].reg, regs[i].size, regs[i].value); in MT9M114_MultiWrite()
185 uint16_t value = 0U; in MT9M114_SetState() local
197 status = MT9M114_Read(handle, MT9M114_REG_COMMAND_REGISTER, 2u, &value); in MT9M114_SetState()
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