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/hal_nxp-latest/mcux/mcux-sdk/CMSIS/DSP/PrivateInclude/
Darm_vec_fft.h64 uint64_t *src = (uint64_t *) pSrc; in arm_bitreversal_32_inpl_mve() local
89 inLow = vldrdq_gather_offset_u64(src, bitRevOff0Low); in arm_bitreversal_32_inpl_mve()
90 inHigh = vldrdq_gather_offset_u64(src, bitRevOff0High); in arm_bitreversal_32_inpl_mve()
92 vstrdq_scatter_offset_u64(src, bitRevOff0Low, inHigh); in arm_bitreversal_32_inpl_mve()
93 vstrdq_scatter_offset_u64(src, bitRevOff0High, inLow); in arm_bitreversal_32_inpl_mve()
103 inLow = vldrdq_gather_offset_u64(src, bitRevOff1Low); in arm_bitreversal_32_inpl_mve()
104 inHigh = vldrdq_gather_offset_u64(src, bitRevOff1High); in arm_bitreversal_32_inpl_mve()
106 vstrdq_scatter_offset_u64(src, bitRevOff1Low, inHigh); in arm_bitreversal_32_inpl_mve()
107 vstrdq_scatter_offset_u64(src, bitRevOff1High, inLow); in arm_bitreversal_32_inpl_mve()
117 inLow = vldrdq_gather_offset_u64(src, bitRevOff0Low); in arm_bitreversal_32_inpl_mve()
[all …]
/hal_nxp-latest/s32/drivers/s32ze/Mcu/
DCMakeLists.txt7 src/Clock_Ip.c
8 src/Clock_Ip_Data.c
9 src/Clock_Ip_Divider.c
10 src/Clock_Ip_DividerTrigger.c
11 src/Clock_Ip_ExtOsc.c
12 src/Clock_Ip_FracDiv.c
13 src/Clock_Ip_Frequency.c
14 src/Clock_Ip_Gate.c
15 src/Clock_Ip_IntOsc.c
16 src/Clock_Ip_Irq.c
[all …]
/hal_nxp-latest/s32/drivers/s32k3/Mcu/
DCMakeLists.txt7 src/Clock_Ip.c
8 src/Clock_Ip_Data.c
9 src/Clock_Ip_Divider.c
10 src/Clock_Ip_DividerTrigger.c
11 src/Clock_Ip_ExtOsc.c
12 src/Clock_Ip_FracDiv.c
13 src/Clock_Ip_Frequency.c
14 src/Clock_Ip_Gate.c
15 src/Clock_Ip_IntOsc.c
16 src/Clock_Ip_Irq.c
[all …]
/hal_nxp-latest/s32/drivers/s32k1/Mcu/
DCMakeLists.txt7 src/Clock_Ip.c
8 src/Clock_Ip_Data.c
9 src/Clock_Ip_Divider.c
10 src/Clock_Ip_DividerTrigger.c
11 src/Clock_Ip_ExtOsc.c
12 src/Clock_Ip_FracDiv.c
13 src/Clock_Ip_Frequency.c
14 src/Clock_Ip_Gate.c
15 src/Clock_Ip_IntOsc.c
16 src/Clock_Ip_Irq.c
[all …]
/hal_nxp-latest/mcux/mcux-sdk/boards/twrke18f/
Dclock_config.c79 .src = kSCG_SysClkSrcSirc /* System clock source */ in CLOCK_CONFIG_FircSafeConfig()
89 } while (curConfig.src != sysClkSafeConfigSource.src); in CLOCK_CONFIG_FircSafeConfig()
94 sysClkSafeConfigSource.src = kSCG_SysClkSrcFirc; in CLOCK_CONFIG_FircSafeConfig()
100 } while (curConfig.src != sysClkSafeConfigSource.src); in CLOCK_CONFIG_FircSafeConfig()
162 .src = kSCG_SysClkSrcSysOsc, /* System OSC is selected as System Clock Source */
191 .src = kSCG_SysPllSrcSysOsc, /* System PLL clock source is System OSC */
274 .src = kSCG_SysClkSrcSysPll, /* System PLL is selected as System Clock Source */
303 .src = kSCG_SysPllSrcSysOsc, /* System PLL clock source is System OSC */
330 } while (curConfig.src != g_sysClkConfig_BOARD_BootClockRUN.src); in BOARD_BootClockRUN()
394 .src = kSCG_SysClkSrcSysPll, /* System PLL is selected as System Clock Source */
[all …]
/hal_nxp-latest/s32/drivers/s32ze/Rte/
DCMakeLists.txt5 zephyr_library_sources_ifdef(CONFIG_ADC_NXP_S32_ADC_SAR src/SchM_Adc.c)
6 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NXP_S32 src/SchM_Mcu.c)
7 zephyr_library_sources_ifdef(CONFIG_MBOX_NXP_S32_MRU src/SchM_Platform.c)
8 zephyr_library_sources_ifdef(CONFIG_NXP_S32_SPI src/SchM_Spi.c)
9 zephyr_library_sources_ifdef(CONFIG_UART_NXP_S32_LINFLEXD src/SchM_Uart.c)
10 zephyr_library_sources_ifdef(CONFIG_CAN_NXP_S32_CANXL src/SchM_Can_43_CANEXCEL.c)
11 zephyr_library_sources_ifdef(CONFIG_ETH_NXP_S32_NETC src/SchM_Eth_43_NETC.c)
12 zephyr_library_sources_ifdef(CONFIG_ETH_NXP_S32_NETC src/SchM_EthSwt_43_NETC.c)
13 zephyr_library_sources_ifdef(CONFIG_NXP_S32_EMIOS src/SchM_Mcl.c)
14 zephyr_library_sources_ifdef(CONFIG_PWM_NXP_S32_EMIOS src/SchM_Pwm.c)
[all …]
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmk32l2a4s/
Dclock_config.c102 .src = kSCG_SysClkSrcSirc, /* System clock source */ in CLOCK_CONFIG_FircSafeConfig()
115 } while (curConfig.src != sysClkSafeConfigSource.src); in CLOCK_CONFIG_FircSafeConfig()
120 sysClkSafeConfigSource.src = kSCG_SysClkSrcFirc; in CLOCK_CONFIG_FircSafeConfig()
126 } while (curConfig.src != sysClkSafeConfigSource.src); in CLOCK_CONFIG_FircSafeConfig()
186 .src = kSCG_SysClkSrcFirc, /* Fast IRC is selected as System Clock Source */
222 .src = kSCG_SysPllSrcSysOsc, /* System PLL clock source is System OSC */
247 } while (curConfig.src != g_sysClkConfig_BOARD_BootClockRUN.src); in BOARD_BootClockRUN()
317 … .src = kSCG_SysClkSrcSysPll, /* System PLL is selected as System Clock Source */
353 .src = kSCG_SysPllSrcFirc, /* System PLL clock source is Fast IRC */
387 } while (curConfig.src != g_sysClkConfig_BOARD_BootClockHSRUN.src); in BOARD_BootClockHSRUN()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/drivers/
Dfsl_clock.h751 static inline void CLOCK_SetEr32kClock(uint32_t src) in CLOCK_SetEr32kClock() argument
753 SIM->SOPT1 = ((SIM->SOPT1 & ~SIM_SOPT1_OSC32KSEL_MASK) | SIM_SOPT1_OSC32KSEL(src)); in CLOCK_SetEr32kClock()
761 static inline void CLOCK_SetSdhc0Clock(uint32_t src) in CLOCK_SetSdhc0Clock() argument
763 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
771 static inline void CLOCK_SetLpuartClock(uint32_t src) in CLOCK_SetLpuartClock() argument
773 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_LPUARTSRC_MASK) | SIM_SOPT2_LPUARTSRC(src)); in CLOCK_SetLpuartClock()
781 static inline void CLOCK_SetTpmClock(uint32_t src) in CLOCK_SetTpmClock() argument
783 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_TPMSRC_MASK) | SIM_SOPT2_TPMSRC(src)); in CLOCK_SetTpmClock()
791 static inline void CLOCK_SetFlexio0Clock(uint32_t src) in CLOCK_SetFlexio0Clock() argument
793 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_FLEXIOSRC_MASK) | SIM_SOPT2_FLEXIOSRC(src)); in CLOCK_SetFlexio0Clock()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/drivers/
Dfsl_clock.h751 static inline void CLOCK_SetEr32kClock(uint32_t src) in CLOCK_SetEr32kClock() argument
753 SIM->SOPT1 = ((SIM->SOPT1 & ~SIM_SOPT1_OSC32KSEL_MASK) | SIM_SOPT1_OSC32KSEL(src)); in CLOCK_SetEr32kClock()
761 static inline void CLOCK_SetSdhc0Clock(uint32_t src) in CLOCK_SetSdhc0Clock() argument
763 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
771 static inline void CLOCK_SetLpuartClock(uint32_t src) in CLOCK_SetLpuartClock() argument
773 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_LPUARTSRC_MASK) | SIM_SOPT2_LPUARTSRC(src)); in CLOCK_SetLpuartClock()
781 static inline void CLOCK_SetTpmClock(uint32_t src) in CLOCK_SetTpmClock() argument
783 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_TPMSRC_MASK) | SIM_SOPT2_TPMSRC(src)); in CLOCK_SetTpmClock()
791 static inline void CLOCK_SetFlexio0Clock(uint32_t src) in CLOCK_SetFlexio0Clock() argument
793 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_FLEXIOSRC_MASK) | SIM_SOPT2_FLEXIOSRC(src)); in CLOCK_SetFlexio0Clock()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/drivers/
Dfsl_clock.h748 static inline void CLOCK_SetEr32kClock(uint32_t src) in CLOCK_SetEr32kClock() argument
750 SIM->SOPT1 = ((SIM->SOPT1 & ~SIM_SOPT1_OSC32KSEL_MASK) | SIM_SOPT1_OSC32KSEL(src)); in CLOCK_SetEr32kClock()
758 static inline void CLOCK_SetSdhc0Clock(uint32_t src) in CLOCK_SetSdhc0Clock() argument
760 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
768 static inline void CLOCK_SetLpuartClock(uint32_t src) in CLOCK_SetLpuartClock() argument
770 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_LPUARTSRC_MASK) | SIM_SOPT2_LPUARTSRC(src)); in CLOCK_SetLpuartClock()
778 static inline void CLOCK_SetEnetTime0Clock(uint32_t src) in CLOCK_SetEnetTime0Clock() argument
780 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_TIMESRC_MASK) | SIM_SOPT2_TIMESRC(src)); in CLOCK_SetEnetTime0Clock()
788 static inline void CLOCK_SetRmii0Clock(uint32_t src) in CLOCK_SetRmii0Clock() argument
790 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_RMIISRC_MASK) | SIM_SOPT2_RMIISRC(src)); in CLOCK_SetRmii0Clock()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/drivers/
Dfsl_clock.h747 static inline void CLOCK_SetEr32kClock(uint32_t src) in CLOCK_SetEr32kClock() argument
749 SIM->SOPT1 = ((SIM->SOPT1 & ~SIM_SOPT1_OSC32KSEL_MASK) | SIM_SOPT1_OSC32KSEL(src)); in CLOCK_SetEr32kClock()
757 static inline void CLOCK_SetSdhc0Clock(uint32_t src) in CLOCK_SetSdhc0Clock() argument
759 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
767 static inline void CLOCK_SetEnetTime0Clock(uint32_t src) in CLOCK_SetEnetTime0Clock() argument
769 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_TIMESRC_MASK) | SIM_SOPT2_TIMESRC(src)); in CLOCK_SetEnetTime0Clock()
777 static inline void CLOCK_SetRmii0Clock(uint32_t src) in CLOCK_SetRmii0Clock() argument
779 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_RMIISRC_MASK) | SIM_SOPT2_RMIISRC(src)); in CLOCK_SetRmii0Clock()
787 static inline void CLOCK_SetLpuartClock(uint32_t src) in CLOCK_SetLpuartClock() argument
789 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_LPUARTSRC_MASK) | SIM_SOPT2_LPUARTSRC(src)); in CLOCK_SetLpuartClock()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/drivers/
Dfsl_clock.c143 #define CLOCK_IP_SRC_PCC_PCS(src) (((uint32_t)(src)) & (PCC_CLKCFG_PCS_MASK >> PCC_CLKCFG_PCS_SHIFT… argument
291 void CLOCK_SetIpSrc(clock_ip_name_t name, clock_ip_src_t src) in CLOCK_SetIpSrc() argument
310 assert(CLOCK_IP_SOURCE_NON_PCC_INDEX_VAL(src) == 4U); in CLOCK_SetIpSrc()
311 if (((uint32_t)src & 0x10U) == 0U) in CLOCK_SetIpSrc()
315 … (CGC_RTD->TPM3_2CLK & ~CGC_TPM3_2CLK_TPM2CLK_MASK) | CGC_TPM3_2CLK_TPM2CLK(src); in CLOCK_SetIpSrc()
322 reg |= PCC_CLKCFG_PCS(src); in CLOCK_SetIpSrc()
326 assert(CLOCK_IP_SOURCE_NON_PCC_INDEX_VAL(src) == 5U); in CLOCK_SetIpSrc()
327 if (((uint32_t)src & 0x10U) == 0U) in CLOCK_SetIpSrc()
331 … (CGC_RTD->TPM3_2CLK & ~CGC_TPM3_2CLK_TPM3CLK_MASK) | CGC_TPM3_2CLK_TPM3CLK(src); in CLOCK_SetIpSrc()
338 reg |= PCC_CLKCFG_PCS(src); in CLOCK_SetIpSrc()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/drivers/
Dfsl_clock.c143 #define CLOCK_IP_SRC_PCC_PCS(src) (((uint32_t)(src)) & (PCC_CLKCFG_PCS_MASK >> PCC_CLKCFG_PCS_SHIFT… argument
291 void CLOCK_SetIpSrc(clock_ip_name_t name, clock_ip_src_t src) in CLOCK_SetIpSrc() argument
310 assert(CLOCK_IP_SOURCE_NON_PCC_INDEX_VAL(src) == 4U); in CLOCK_SetIpSrc()
311 if (((uint32_t)src & 0x10U) == 0U) in CLOCK_SetIpSrc()
315 … (CGC_RTD->TPM3_2CLK & ~CGC_TPM3_2CLK_TPM2CLK_MASK) | CGC_TPM3_2CLK_TPM2CLK(src); in CLOCK_SetIpSrc()
322 reg |= PCC_CLKCFG_PCS(src); in CLOCK_SetIpSrc()
326 assert(CLOCK_IP_SOURCE_NON_PCC_INDEX_VAL(src) == 5U); in CLOCK_SetIpSrc()
327 if (((uint32_t)src & 0x10U) == 0U) in CLOCK_SetIpSrc()
331 … (CGC_RTD->TPM3_2CLK & ~CGC_TPM3_2CLK_TPM3CLK_MASK) | CGC_TPM3_2CLK_TPM3CLK(src); in CLOCK_SetIpSrc()
338 reg |= PCC_CLKCFG_PCS(src); in CLOCK_SetIpSrc()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/drivers/
Dfsl_clock.c143 #define CLOCK_IP_SRC_PCC_PCS(src) (((uint32_t)(src)) & (PCC_CLKCFG_PCS_MASK >> PCC_CLKCFG_PCS_SHIFT… argument
291 void CLOCK_SetIpSrc(clock_ip_name_t name, clock_ip_src_t src) in CLOCK_SetIpSrc() argument
310 assert(CLOCK_IP_SOURCE_NON_PCC_INDEX_VAL(src) == 4U); in CLOCK_SetIpSrc()
311 if (((uint32_t)src & 0x10U) == 0U) in CLOCK_SetIpSrc()
315 … (CGC_RTD->TPM3_2CLK & ~CGC_TPM3_2CLK_TPM2CLK_MASK) | CGC_TPM3_2CLK_TPM2CLK(src); in CLOCK_SetIpSrc()
322 reg |= PCC_CLKCFG_PCS(src); in CLOCK_SetIpSrc()
326 assert(CLOCK_IP_SOURCE_NON_PCC_INDEX_VAL(src) == 5U); in CLOCK_SetIpSrc()
327 if (((uint32_t)src & 0x10U) == 0U) in CLOCK_SetIpSrc()
331 … (CGC_RTD->TPM3_2CLK & ~CGC_TPM3_2CLK_TPM3CLK_MASK) | CGC_TPM3_2CLK_TPM3CLK(src); in CLOCK_SetIpSrc()
338 reg |= PCC_CLKCFG_PCS(src); in CLOCK_SetIpSrc()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/drivers/
Dfsl_clock.c143 #define CLOCK_IP_SRC_PCC_PCS(src) (((uint32_t)(src)) & (PCC_CLKCFG_PCS_MASK >> PCC_CLKCFG_PCS_SHIFT… argument
291 void CLOCK_SetIpSrc(clock_ip_name_t name, clock_ip_src_t src) in CLOCK_SetIpSrc() argument
310 assert(CLOCK_IP_SOURCE_NON_PCC_INDEX_VAL(src) == 4U); in CLOCK_SetIpSrc()
311 if (((uint32_t)src & 0x10U) == 0U) in CLOCK_SetIpSrc()
315 … (CGC_RTD->TPM3_2CLK & ~CGC_TPM3_2CLK_TPM2CLK_MASK) | CGC_TPM3_2CLK_TPM2CLK(src); in CLOCK_SetIpSrc()
322 reg |= PCC_CLKCFG_PCS(src); in CLOCK_SetIpSrc()
326 assert(CLOCK_IP_SOURCE_NON_PCC_INDEX_VAL(src) == 5U); in CLOCK_SetIpSrc()
327 if (((uint32_t)src & 0x10U) == 0U) in CLOCK_SetIpSrc()
331 … (CGC_RTD->TPM3_2CLK & ~CGC_TPM3_2CLK_TPM3CLK_MASK) | CGC_TPM3_2CLK_TPM3CLK(src); in CLOCK_SetIpSrc()
338 reg |= PCC_CLKCFG_PCS(src); in CLOCK_SetIpSrc()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/drivers/
Dfsl_clock.c143 #define CLOCK_IP_SRC_PCC_PCS(src) (((uint32_t)(src)) & (PCC_CLKCFG_PCS_MASK >> PCC_CLKCFG_PCS_SHIFT… argument
291 void CLOCK_SetIpSrc(clock_ip_name_t name, clock_ip_src_t src) in CLOCK_SetIpSrc() argument
310 assert(CLOCK_IP_SOURCE_NON_PCC_INDEX_VAL(src) == 4U); in CLOCK_SetIpSrc()
311 if (((uint32_t)src & 0x10U) == 0U) in CLOCK_SetIpSrc()
315 … (CGC_RTD->TPM3_2CLK & ~CGC_TPM3_2CLK_TPM2CLK_MASK) | CGC_TPM3_2CLK_TPM2CLK(src); in CLOCK_SetIpSrc()
322 reg |= PCC_CLKCFG_PCS(src); in CLOCK_SetIpSrc()
326 assert(CLOCK_IP_SOURCE_NON_PCC_INDEX_VAL(src) == 5U); in CLOCK_SetIpSrc()
327 if (((uint32_t)src & 0x10U) == 0U) in CLOCK_SetIpSrc()
331 … (CGC_RTD->TPM3_2CLK & ~CGC_TPM3_2CLK_TPM3CLK_MASK) | CGC_TPM3_2CLK_TPM3CLK(src); in CLOCK_SetIpSrc()
338 reg |= PCC_CLKCFG_PCS(src); in CLOCK_SetIpSrc()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmke17z512/
Dclock_config.c75 .src = kSCG_SysClkSrcSirc /* System clock source */ in CLOCK_CONFIG_FircSafeConfig()
85 } while (curConfig.src != sysClkSafeConfigSource.src); in CLOCK_CONFIG_FircSafeConfig()
90 sysClkSafeConfigSource.src = kSCG_SysClkSrcFirc; in CLOCK_CONFIG_FircSafeConfig()
96 } while (curConfig.src != sysClkSafeConfigSource.src); in CLOCK_CONFIG_FircSafeConfig()
163 … .src = kSCG_SysClkSrcLpFll, /* Low power FLL is selected as System Clock Source */
216 } while (curConfig.src != g_sysClkConfig_BOARD_BootClockRUN.src); in BOARD_BootClockRUN()
273 … .src = kSCG_SysClkSrcSysOsc, /* System OSC is selected as System Clock Source */
375 … .src = kSCG_SysClkSrcLpFll, /* Low power FLL is selected as System Clock Source */
435 } while (curConfig.src != g_sysClkConfig_BOARD_BootClockHSRUN.src); in BOARD_BootClockHSRUN()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimx8ulp/
Dclock_config.c57 .src = kCGC_PllSrcSysOsc,
79 .src = kCGC_PllSrcSysOsc,
95 .src = kCGC_RtdSysClkSrcFro, /* System clock source. */
147 .src = kCGC_RtdSysClkSrcPll0Pfd0, /* PLL0PFD0 main clock source. */
152 .src = kCGC_RtdSysClkSrcPll1Pfd0, /* PLL1PFD0 main clock source. */
157 .src = kCGC_RtdSysClkSrcPll0, /* PLL0 main clock source. */
360 tmp_sys_clk_cfg.src = clk_src; in BOARD_CalculateCoreClkDivider()
408 …ARD_CalculateCoreClkDivider((cgc_rtd_sys_clk_src_t)g_sysClkConfigFroSource.src, &core_clk_divider,… in BOARD_SwitchToFROClk()
503 clk_src[i] = (cgc_rtd_sys_clk_src_t)g_sysClkConfigRun.src; in BOARD_UpdateM33CoreFreq()
559 config->src = clk_src[DRIVE_MODE_OD]; in BOARD_UpdateM33CoreFreq()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/drivers/
Dfsl_clock.h722 static inline void CLOCK_SetEr32kClock(uint32_t src) in CLOCK_SetEr32kClock() argument
724 SIM->SOPT1 = ((SIM->SOPT1 & ~SIM_SOPT1_OSC32KSEL_MASK) | SIM_SOPT1_OSC32KSEL(src)); in CLOCK_SetEr32kClock()
732 static inline void CLOCK_SetSdhc0Clock(uint32_t src) in CLOCK_SetSdhc0Clock() argument
734 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
742 static inline void CLOCK_SetEmvsimClock(uint32_t src) in CLOCK_SetEmvsimClock() argument
744 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_EMVSIMSRC_MASK) | SIM_SOPT2_EMVSIMSRC(src)); in CLOCK_SetEmvsimClock()
752 static inline void CLOCK_SetLpuartClock(uint32_t src) in CLOCK_SetLpuartClock() argument
754 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_LPUARTSRC_MASK) | SIM_SOPT2_LPUARTSRC(src)); in CLOCK_SetLpuartClock()
762 static inline void CLOCK_SetTpmClock(uint32_t src) in CLOCK_SetTpmClock() argument
764 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_TPMSRC_MASK) | SIM_SOPT2_TPMSRC(src)); in CLOCK_SetTpmClock()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/drivers/
Dfsl_clock.h715 static inline void CLOCK_SetEr32kClock(uint32_t src) in CLOCK_SetEr32kClock() argument
717 SIM->SOPT1 = ((SIM->SOPT1 & ~SIM_SOPT1_OSC32KSEL_MASK) | SIM_SOPT1_OSC32KSEL(src)); in CLOCK_SetEr32kClock()
725 static inline void CLOCK_SetSdhc0Clock(uint32_t src) in CLOCK_SetSdhc0Clock() argument
727 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
735 static inline void CLOCK_SetEmvsimClock(uint32_t src) in CLOCK_SetEmvsimClock() argument
737 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_EMVSIMSRC_MASK) | SIM_SOPT2_EMVSIMSRC(src)); in CLOCK_SetEmvsimClock()
745 static inline void CLOCK_SetLpuartClock(uint32_t src) in CLOCK_SetLpuartClock() argument
747 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_LPUARTSRC_MASK) | SIM_SOPT2_LPUARTSRC(src)); in CLOCK_SetLpuartClock()
755 static inline void CLOCK_SetTpmClock(uint32_t src) in CLOCK_SetTpmClock() argument
757 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_TPMSRC_MASK) | SIM_SOPT2_TPMSRC(src)); in CLOCK_SetTpmClock()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC444/drivers/
Dfsl_clock.h459 static inline void CLOCK_SetEr32kClock(uint32_t src) in CLOCK_SetEr32kClock() argument
461 SIM->SOPT1 = ((SIM->SOPT1 & ~SIM_SOPT1_OSC32KSEL_MASK) | SIM_SOPT1_OSC32KSEL(src)); in CLOCK_SetEr32kClock()
469 static inline void CLOCK_SetLpuart0Clock(uint32_t src) in CLOCK_SetLpuart0Clock() argument
471 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_LPUART0SRC_MASK) | SIM_SOPT2_LPUART0SRC(src)); in CLOCK_SetLpuart0Clock()
479 static inline void CLOCK_SetLpuart1Clock(uint32_t src) in CLOCK_SetLpuart1Clock() argument
481 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_LPUART1SRC_MASK) | SIM_SOPT2_LPUART1SRC(src)); in CLOCK_SetLpuart1Clock()
489 static inline void CLOCK_SetTpmClock(uint32_t src) in CLOCK_SetTpmClock() argument
491 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_TPMSRC_MASK) | SIM_SOPT2_TPMSRC(src)); in CLOCK_SetTpmClock()
499 static inline void CLOCK_SetFlexio0Clock(uint32_t src) in CLOCK_SetFlexio0Clock() argument
501 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_FLEXIOSRC_MASK) | SIM_SOPT2_FLEXIOSRC(src)); in CLOCK_SetFlexio0Clock()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC443/drivers/
Dfsl_clock.h459 static inline void CLOCK_SetEr32kClock(uint32_t src) in CLOCK_SetEr32kClock() argument
461 SIM->SOPT1 = ((SIM->SOPT1 & ~SIM_SOPT1_OSC32KSEL_MASK) | SIM_SOPT1_OSC32KSEL(src)); in CLOCK_SetEr32kClock()
469 static inline void CLOCK_SetLpuart0Clock(uint32_t src) in CLOCK_SetLpuart0Clock() argument
471 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_LPUART0SRC_MASK) | SIM_SOPT2_LPUART0SRC(src)); in CLOCK_SetLpuart0Clock()
479 static inline void CLOCK_SetLpuart1Clock(uint32_t src) in CLOCK_SetLpuart1Clock() argument
481 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_LPUART1SRC_MASK) | SIM_SOPT2_LPUART1SRC(src)); in CLOCK_SetLpuart1Clock()
489 static inline void CLOCK_SetTpmClock(uint32_t src) in CLOCK_SetTpmClock() argument
491 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_TPMSRC_MASK) | SIM_SOPT2_TPMSRC(src)); in CLOCK_SetTpmClock()
499 static inline void CLOCK_SetFlexio0Clock(uint32_t src) in CLOCK_SetFlexio0Clock() argument
501 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_FLEXIOSRC_MASK) | SIM_SOPT2_FLEXIOSRC(src)); in CLOCK_SetFlexio0Clock()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B31A/drivers/
Dfsl_clock.h460 static inline void CLOCK_SetEr32kClock(uint32_t src) in CLOCK_SetEr32kClock() argument
462 SIM->SOPT1 = ((SIM->SOPT1 & ~SIM_SOPT1_OSC32KSEL_MASK) | SIM_SOPT1_OSC32KSEL(src)); in CLOCK_SetEr32kClock()
470 static inline void CLOCK_SetLpuart0Clock(uint32_t src) in CLOCK_SetLpuart0Clock() argument
472 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_LPUART0SRC_MASK) | SIM_SOPT2_LPUART0SRC(src)); in CLOCK_SetLpuart0Clock()
480 static inline void CLOCK_SetLpuart1Clock(uint32_t src) in CLOCK_SetLpuart1Clock() argument
482 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_LPUART1SRC_MASK) | SIM_SOPT2_LPUART1SRC(src)); in CLOCK_SetLpuart1Clock()
490 static inline void CLOCK_SetTpmClock(uint32_t src) in CLOCK_SetTpmClock() argument
492 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_TPMSRC_MASK) | SIM_SOPT2_TPMSRC(src)); in CLOCK_SetTpmClock()
500 static inline void CLOCK_SetFlexio0Clock(uint32_t src) in CLOCK_SetFlexio0Clock() argument
502 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_FLEXIOSRC_MASK) | SIM_SOPT2_FLEXIOSRC(src)); in CLOCK_SetFlexio0Clock()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/drivers/
Dfsl_clock.h459 static inline void CLOCK_SetEr32kClock(uint32_t src) in CLOCK_SetEr32kClock() argument
461 SIM->SOPT1 = ((SIM->SOPT1 & ~SIM_SOPT1_OSC32KSEL_MASK) | SIM_SOPT1_OSC32KSEL(src)); in CLOCK_SetEr32kClock()
469 static inline void CLOCK_SetLpuart0Clock(uint32_t src) in CLOCK_SetLpuart0Clock() argument
471 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_LPUART0SRC_MASK) | SIM_SOPT2_LPUART0SRC(src)); in CLOCK_SetLpuart0Clock()
479 static inline void CLOCK_SetLpuart1Clock(uint32_t src) in CLOCK_SetLpuart1Clock() argument
481 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_LPUART1SRC_MASK) | SIM_SOPT2_LPUART1SRC(src)); in CLOCK_SetLpuart1Clock()
489 static inline void CLOCK_SetTpmClock(uint32_t src) in CLOCK_SetTpmClock() argument
491 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_TPMSRC_MASK) | SIM_SOPT2_TPMSRC(src)); in CLOCK_SetTpmClock()
499 static inline void CLOCK_SetFlexio0Clock(uint32_t src) in CLOCK_SetFlexio0Clock() argument
501 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_FLEXIOSRC_MASK) | SIM_SOPT2_FLEXIOSRC(src)); in CLOCK_SetFlexio0Clock()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/drivers/
Dfsl_clock.h459 static inline void CLOCK_SetEr32kClock(uint32_t src) in CLOCK_SetEr32kClock() argument
461 SIM->SOPT1 = ((SIM->SOPT1 & ~SIM_SOPT1_OSC32KSEL_MASK) | SIM_SOPT1_OSC32KSEL(src)); in CLOCK_SetEr32kClock()
469 static inline void CLOCK_SetLpuart0Clock(uint32_t src) in CLOCK_SetLpuart0Clock() argument
471 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_LPUART0SRC_MASK) | SIM_SOPT2_LPUART0SRC(src)); in CLOCK_SetLpuart0Clock()
479 static inline void CLOCK_SetLpuart1Clock(uint32_t src) in CLOCK_SetLpuart1Clock() argument
481 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_LPUART1SRC_MASK) | SIM_SOPT2_LPUART1SRC(src)); in CLOCK_SetLpuart1Clock()
489 static inline void CLOCK_SetTpmClock(uint32_t src) in CLOCK_SetTpmClock() argument
491 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_TPMSRC_MASK) | SIM_SOPT2_TPMSRC(src)); in CLOCK_SetTpmClock()
499 static inline void CLOCK_SetFlexio0Clock(uint32_t src) in CLOCK_SetFlexio0Clock() argument
501 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_FLEXIOSRC_MASK) | SIM_SOPT2_FLEXIOSRC(src)); in CLOCK_SetFlexio0Clock()
[all …]

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