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Searched refs:kResc_SRAM_GPU (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT533S/
Dfsl_pm_device.h87 kResc_SRAM_GPU, /*!< GPU SRAM */ enumerator
208 #define PM_RESC_GPU_SRAM_ACTIVE PM_ENCODE_RESC(PM_RESOURCE_FULL_ON, kResc_SRAM_GPU)
209 #define PM_RESC_GPU_SRAM_RETENTION PM_ENCODE_RESC(PM_RESOURCE_PARTABLE_ON1, kResc_SRAM_GPU)
Dfsl_pm_device.c160 [kResc_SRAM_GPU -
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT555S/
Dfsl_pm_device.h87 kResc_SRAM_GPU, /*!< GPU SRAM */ enumerator
208 #define PM_RESC_GPU_SRAM_ACTIVE PM_ENCODE_RESC(PM_RESOURCE_FULL_ON, kResc_SRAM_GPU)
209 #define PM_RESC_GPU_SRAM_RETENTION PM_ENCODE_RESC(PM_RESOURCE_PARTABLE_ON1, kResc_SRAM_GPU)
Dfsl_pm_device.c160 [kResc_SRAM_GPU -
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT595S/
Dfsl_pm_device.h87 kResc_SRAM_GPU, /*!< GPU SRAM */ enumerator
208 #define PM_RESC_GPU_SRAM_ACTIVE PM_ENCODE_RESC(PM_RESOURCE_FULL_ON, kResc_SRAM_GPU)
209 #define PM_RESC_GPU_SRAM_RETENTION PM_ENCODE_RESC(PM_RESOURCE_PARTABLE_ON1, kResc_SRAM_GPU)
Dfsl_pm_device.c160 [kResc_SRAM_GPU -
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT735S/
Dfsl_pm_device.h146 kResc_SRAM_GPU, /*!< VGPU SRAM */ enumerator
305 #define PM_RESC_SRAM_GPU_ACTIVE PM_ENCODE_RESC(PM_RESOURCE_FULL_ON, kResc_SRAM_GPU)
329 #define PM_RESC_SRAM_GPU_RETENTION PM_ENCODE_RESC(PM_RESOURCE_PARTABLE_ON1, kResc_SRAM_GPU)
Dfsl_pm_device.c237 [kResc_SRAM_GPU - RESC_GROUP_SRAMS_START] = {5U, PMC_PDSLEEPCFG4_GPU_MASK},
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT758S/
Dfsl_pm_device.h146 kResc_SRAM_GPU, /*!< VGPU SRAM */ enumerator
305 #define PM_RESC_SRAM_GPU_ACTIVE PM_ENCODE_RESC(PM_RESOURCE_FULL_ON, kResc_SRAM_GPU)
329 #define PM_RESC_SRAM_GPU_RETENTION PM_ENCODE_RESC(PM_RESOURCE_PARTABLE_ON1, kResc_SRAM_GPU)
Dfsl_pm_device.c237 [kResc_SRAM_GPU - RESC_GROUP_SRAMS_START] = {5U, PMC_PDSLEEPCFG4_GPU_MASK},
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT798S/
Dfsl_pm_device.h146 kResc_SRAM_GPU, /*!< VGPU SRAM */ enumerator
305 #define PM_RESC_SRAM_GPU_ACTIVE PM_ENCODE_RESC(PM_RESOURCE_FULL_ON, kResc_SRAM_GPU)
329 #define PM_RESC_SRAM_GPU_RETENTION PM_ENCODE_RESC(PM_RESOURCE_PARTABLE_ON1, kResc_SRAM_GPU)
Dfsl_pm_device.c237 [kResc_SRAM_GPU - RESC_GROUP_SRAMS_START] = {5U, PMC_PDSLEEPCFG4_GPU_MASK},