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Searched refs:clkSrc (Results 1 – 25 of 44) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/drivers/
Dfsl_misc.h48 uint8_t clkSrc) in BLK_CTRL_SetSaiMClkClockSource() argument
55 base->SAI3_MCLK_CTRL = ((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) | temp; in BLK_CTRL_SetSaiMClkClockSource()
60 base->SAI2_MCLK_CTRL = ((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) | temp; in BLK_CTRL_SetSaiMClkClockSource()
65 …base->SAI4_MCLK_CTRL = (((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | tem… in BLK_CTRL_SetSaiMClkClockSource()
70 …base->SAI4_MCLK_CTRL = (((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | temp; in BLK_CTRL_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/drivers/
Dfsl_misc.h48 uint8_t clkSrc) in BLK_CTRL_SetSaiMClkClockSource() argument
55 base->SAI3_MCLK_CTRL = ((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) | temp; in BLK_CTRL_SetSaiMClkClockSource()
60 base->SAI2_MCLK_CTRL = ((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) | temp; in BLK_CTRL_SetSaiMClkClockSource()
65 …base->SAI4_MCLK_CTRL = (((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | tem… in BLK_CTRL_SetSaiMClkClockSource()
70 …base->SAI4_MCLK_CTRL = (((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | temp; in BLK_CTRL_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/drivers/
Dfsl_misc.h48 uint8_t clkSrc) in BLK_CTRL_SetSaiMClkClockSource() argument
55 base->SAI3_MCLK_CTRL = ((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) | temp; in BLK_CTRL_SetSaiMClkClockSource()
60 base->SAI2_MCLK_CTRL = ((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) | temp; in BLK_CTRL_SetSaiMClkClockSource()
65 …base->SAI4_MCLK_CTRL = (((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | tem… in BLK_CTRL_SetSaiMClkClockSource()
70 …base->SAI4_MCLK_CTRL = (((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | temp; in BLK_CTRL_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/drivers/
Dfsl_misc.h48 uint8_t clkSrc) in BLK_CTRL_SetSaiMClkClockSource() argument
55 base->SAI3_MCLK_CTRL = ((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) | temp; in BLK_CTRL_SetSaiMClkClockSource()
60 base->SAI2_MCLK_CTRL = ((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) | temp; in BLK_CTRL_SetSaiMClkClockSource()
65 …base->SAI4_MCLK_CTRL = (((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | tem… in BLK_CTRL_SetSaiMClkClockSource()
70 …base->SAI4_MCLK_CTRL = (((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | temp; in BLK_CTRL_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/drivers/
Dfsl_iomuxc.h496 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
503 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
508 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/drivers/
Dfsl_iomuxc.h517 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
524 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
529 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_iomuxc.h1685 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
1692 base->GPR2 = ((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) | gpr; in IOMUXC_SetSaiMClkClockSource()
1697 base->GPR1 = ((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) | gpr; in IOMUXC_SetSaiMClkClockSource()
1702 base->GPR0 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
1707 base->GPR0 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_iomuxc.h1685 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
1692 base->GPR2 = ((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) | gpr; in IOMUXC_SetSaiMClkClockSource()
1697 base->GPR1 = ((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) | gpr; in IOMUXC_SetSaiMClkClockSource()
1702 base->GPR0 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
1707 base->GPR0 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_iomuxc.h1685 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
1692 base->GPR2 = ((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) | gpr; in IOMUXC_SetSaiMClkClockSource()
1697 base->GPR1 = ((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) | gpr; in IOMUXC_SetSaiMClkClockSource()
1702 base->GPR0 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
1707 base->GPR0 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_iomuxc.h1685 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
1692 base->GPR2 = ((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) | gpr; in IOMUXC_SetSaiMClkClockSource()
1697 base->GPR1 = ((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) | gpr; in IOMUXC_SetSaiMClkClockSource()
1702 base->GPR0 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
1707 base->GPR0 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_iomuxc.h1685 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
1692 base->GPR2 = ((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) | gpr; in IOMUXC_SetSaiMClkClockSource()
1697 base->GPR1 = ((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) | gpr; in IOMUXC_SetSaiMClkClockSource()
1702 base->GPR0 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
1707 base->GPR0 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_iomuxc.h1685 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
1692 base->GPR2 = ((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) | gpr; in IOMUXC_SetSaiMClkClockSource()
1697 base->GPR1 = ((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) | gpr; in IOMUXC_SetSaiMClkClockSource()
1702 base->GPR0 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
1707 base->GPR0 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_iomuxc.h1685 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
1692 base->GPR2 = ((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) | gpr; in IOMUXC_SetSaiMClkClockSource()
1697 base->GPR1 = ((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) | gpr; in IOMUXC_SetSaiMClkClockSource()
1702 base->GPR0 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
1707 base->GPR0 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/drivers/
Dfsl_iomuxc.h934 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
941 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
946 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/drivers/
Dfsl_iomuxc.h880 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
887 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
892 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/drivers/
Dfsl_iomuxc.h1082 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
1089 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
1094 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/drivers/
Dfsl_iomuxc.h1082 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
1089 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
1094 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/drivers/
Dfsl_iomuxc.h1167 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
1174 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
1179 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/drivers/
Dfsl_iomuxc.h1167 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
1174 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
1179 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/drivers/
Dfsl_iomuxc.h1363 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
1370 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
1375 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/drivers/
Dfsl_iomuxc.h1363 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
1370 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
1375 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/drivers/
Dfsl_iomuxc.h1347 …void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc) in IOMUXC_SetSaiMClkClockSource() argument
1354 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
1359 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr; in IOMUXC_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54114/drivers/
Dfsl_clock.c411 async_clock_src_t clkSrc; in CLOCK_GetAsyncApbClkFreq() local
414 clkSrc = CLOCK_GetAsyncApbClkSrc(); in CLOCK_GetAsyncApbClkFreq()
416 switch (clkSrc) in CLOCK_GetAsyncApbClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/drivers/
Dfsl_clock.c411 async_clock_src_t clkSrc; in CLOCK_GetAsyncApbClkFreq() local
414 clkSrc = CLOCK_GetAsyncApbClkSrc(); in CLOCK_GetAsyncApbClkFreq()
416 switch (clkSrc) in CLOCK_GetAsyncApbClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC51U68/drivers/
Dfsl_clock.c412 async_clock_src_t clkSrc; in CLOCK_GetAsyncApbClkFreq() local
415 clkSrc = CLOCK_GetAsyncApbClkSrc(); in CLOCK_GetAsyncApbClkFreq()
417 switch (clkSrc) in CLOCK_GetAsyncApbClkFreq()

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