| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/DSP/Source/TransformFunctions/ |
| D | arm_cfft_radix4_q15.c | 200 T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */ in arm_radix4_butterfly_q15()
201 …T = __SHADD16(T, 0); /* it turns out doing this twice is 2 cycles, the alternative takes 3 cycles … in arm_radix4_butterfly_q15()
209 S = __SHADD16(S, 0); in arm_radix4_butterfly_q15()
210 S = __SHADD16(S, 0); in arm_radix4_butterfly_q15()
221 T = __SHADD16(T, 0); in arm_radix4_butterfly_q15()
222 T = __SHADD16(T, 0); in arm_radix4_butterfly_q15()
226 U = __SHADD16(U, 0); in arm_radix4_butterfly_q15()
227 U = __SHADD16(U, 0); in arm_radix4_butterfly_q15()
235 write_q15x2_ia (&pSi0, __SHADD16(R, T)); in arm_radix4_butterfly_q15()
258 T = __SHADD16(T, 0); in arm_radix4_butterfly_q15()
[all …]
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| D | arm_cfft_radix2_q15.c | 127 write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); in arm_radix2_butterfly_q15()
157 write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); in arm_radix2_butterfly_q15()
199 write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); in arm_radix2_butterfly_q15()
221 write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); in arm_radix2_butterfly_q15()
437 write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); in arm_radix2_butterfly_inverse_q15()
467 write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); in arm_radix2_butterfly_inverse_q15()
508 write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); in arm_radix2_butterfly_inverse_q15()
530 write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); in arm_radix2_butterfly_inverse_q15()
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| D | arm_cfft_q15.c | 721 T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */ in arm_cfft_radix4by2_q15()
724 S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */ in arm_cfft_radix4by2_q15()
728 write_q15x2_ia (&pSi, __SHADD16(T, S)); in arm_cfft_radix4by2_q15()
820 T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */ in arm_cfft_radix4by2_inverse_q15()
823 S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */ in arm_cfft_radix4by2_inverse_q15()
827 write_q15x2_ia (&pSi, __SHADD16(T, S)); in arm_cfft_radix4by2_inverse_q15()
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| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/Include/ |
| D | cmsis_armcc.h | 835 #define __SHADD16 __shadd16 macro
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| D | cmsis_armclang.h | 1380 #define __SHADD16 __builtin_arm_shadd16 macro
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| D | cmsis_iccarm.h | 443 #define __SHADD16 __iar_builtin_SHADD16 macro
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| D | cmsis_armclang_ltm.h | 1479 __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) in __SHADD16() function
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| D | cmsis_gcc.h | 1735 __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) in __SHADD16() function
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| D | arm_math.h | 920 __STATIC_FORCEINLINE uint32_t __SHADD16( in __SHADD16() function
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| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/Core/Include/ |
| D | cmsis_armcc.h | 825 #define __SHADD16 __shadd16 macro
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| D | cmsis_armclang.h | 1435 #define __SHADD16 __builtin_arm_shadd16 macro
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| D | cmsis_iccarm.h | 476 #define __SHADD16 __iar_builtin_SHADD16 macro
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| D | cmsis_armclang_ltm.h | 1512 __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) in __SHADD16() function
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| D | cmsis_gcc.h | 1777 __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) in __SHADD16() function
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| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/DSP/Include/dsp/ |
| D | none.h | 298 __STATIC_FORCEINLINE uint32_t __SHADD16( in __SHADD16() function
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