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Searched refs:WSC (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/s32/drivers/s32ze/Icu/src/
DEmios_Icu_Ip.c712 …s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSC1 &= ~eMIOS_WSC1_MOD… in Emios_Icu_Ip_Init()
723 … s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSC1 = wsRegisterValue; in Emios_Icu_Ip_Init()
731 … s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSC2 = wsRegisterValue; in Emios_Icu_Ip_Init()
733 …s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSEV |= eMIOS_WSEV_EVEN… in Emios_Icu_Ip_Init()
735 …s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSFC |= eMIOS_WSFC_FOOE… in Emios_Icu_Ip_Init()
738 …s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSC1 |= eMIOS_WSC1_MODE… in Emios_Icu_Ip_Init()
848 …s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSC1 &= ~eMIOS_WSC1_MOD… in Emios_Icu_Ip_Deinit()
850 …s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSCAEC &= ~eMIOS_WSCAEC… in Emios_Icu_Ip_Deinit()
851 s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSEV = 0U; in Emios_Icu_Ip_Deinit()
853 s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSC2 = 0U; in Emios_Icu_Ip_Deinit()
[all …]
DEmios_Icu_Ip_Irq.c924 u32WSChannelStatus = (uint32)(s_emiosBase[instance]->CH.WSC[hwWSChannelId].WSS); in Emios_Icu_Ip_WSCProcessInterrupt()
925 u32WSChannelFlagSelection = (uint32)(s_emiosBase[instance]->CH.WSC[hwWSChannelId].WSC2); in Emios_Icu_Ip_WSCProcessInterrupt()
978 s_emiosBase[instance]->CH.WSC[channel].WSS |= u32BitMask; in Emios_Icu_Ip_WsClearStatusFlags()
/hal_nxp-latest/s32/drivers/s32ze/Mcl/src/
DEmios_Mcl_Ip_Irq.c927 if (0U != ((Emios_Ip_paxBase[Instance]->CH.WSC[Channel/2].WSS) & (uint32)u32WsChannelFlag)) in Emios_Gpt_Wsc_IrqHandler()
930 … if (0U != ((Emios_Ip_paxBase[Instance]->CH.WSC[Channel/2].WSC1) & ((uint32)eMIOS_WSC1_FEN_MASK))) in Emios_Gpt_Wsc_IrqHandler()
957 if (0U != ((Emios_Ip_paxBase[Instance]->CH.WSC[Channel/2].WSS) & (uint32)u32WsChannelFlag)) in Emios_Icu_Wsc_IrqHandler()
960 … if (0U != ((Emios_Ip_paxBase[Instance]->CH.WSC[Channel/2].WSC1) & ((uint32)eMIOS_WSC1_FEN_MASK))) in Emios_Icu_Wsc_IrqHandler()
987 if (0U != ((Emios_Ip_paxBase[Instance]->CH.WSC[Channel/2].WSS) & (uint32)u32WsChannelFlag)) in Emios_Ocu_Wsc_IrqHandler()
990 … if (0U != ((Emios_Ip_paxBase[Instance]->CH.WSC[Channel/2].WSC1) & ((uint32)eMIOS_WSC1_FEN_MASK))) in Emios_Ocu_Wsc_IrqHandler()
1017 if (0U != ((Emios_Ip_paxBase[Instance]->CH.WSC[Channel/2].WSS) & (uint32)u32WsChannelFlag)) in Emios_Pwm_Wsc_IrqHandler()
1020 … if (0U != ((Emios_Ip_paxBase[Instance]->CH.WSC[Channel/2].WSC1) & ((uint32)eMIOS_WSC1_FEN_MASK))) in Emios_Pwm_Wsc_IrqHandler()
/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_EMIOS.h107 } WSC[eMIOS_CH_WSC_WSC_COUNT]; member