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Searched refs:VGPUCLKDIV_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_clock.h946 #define VGPUCLKDIV_OFFSET 0x324 macro
1753 …kCLOCK_DivVgpuClk = CLKCTL4_TUPLE_MUXA(VGPUCLKDIV_OFFSET, 0), /*!< VGPU Clk Divider.…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_clock.h946 #define VGPUCLKDIV_OFFSET 0x324 macro
1753 …kCLOCK_DivVgpuClk = CLKCTL4_TUPLE_MUXA(VGPUCLKDIV_OFFSET, 0), /*!< VGPU Clk Divider.…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_clock.h946 #define VGPUCLKDIV_OFFSET 0x324 macro
1753 …kCLOCK_DivVgpuClk = CLKCTL4_TUPLE_MUXA(VGPUCLKDIV_OFFSET, 0), /*!< VGPU Clk Divider.…