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Searched refs:VBAT_OSCCFGA_INIT_TRIM_MASK (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/drivers/mcx_vbat/
Dfsl_vbat.h625 …base->OSCCFGA = ((base->OSCCFGA & ~(VBAT_OSCCFGA_INIT_TRIM_MASK)) | VBAT_OSCCFGA_INIT_TRIM(startup… in VBAT_TrimCrystalOsc32kStartupTime()
626 …base->OSCCFGB = ((base->OSCCFGB & ~(VBAT_OSCCFGA_INIT_TRIM_MASK)) | VBAT_OSCCFGA_INIT_TRIM(~((uint… in VBAT_TrimCrystalOsc32kStartupTime()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h67779 #define VBAT_OSCCFGA_INIT_TRIM_MASK (0xE00U) macro
67791 … (((uint32_t)(((uint32_t)(x)) << VBAT_OSCCFGA_INIT_TRIM_SHIFT)) & VBAT_OSCCFGA_INIT_TRIM_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h67737 #define VBAT_OSCCFGA_INIT_TRIM_MASK (0xE00U) macro
67749 … (((uint32_t)(((uint32_t)(x)) << VBAT_OSCCFGA_INIT_TRIM_SHIFT)) & VBAT_OSCCFGA_INIT_TRIM_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h88465 #define VBAT_OSCCFGA_INIT_TRIM_MASK (0xE00U) macro
88477 … (((uint32_t)(((uint32_t)(x)) << VBAT_OSCCFGA_INIT_TRIM_SHIFT)) & VBAT_OSCCFGA_INIT_TRIM_MASK)
DMCXN546_cm33_core1.h88465 #define VBAT_OSCCFGA_INIT_TRIM_MASK (0xE00U) macro
88477 … (((uint32_t)(((uint32_t)(x)) << VBAT_OSCCFGA_INIT_TRIM_SHIFT)) & VBAT_OSCCFGA_INIT_TRIM_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h88465 #define VBAT_OSCCFGA_INIT_TRIM_MASK (0xE00U) macro
88477 … (((uint32_t)(((uint32_t)(x)) << VBAT_OSCCFGA_INIT_TRIM_SHIFT)) & VBAT_OSCCFGA_INIT_TRIM_MASK)
DMCXN547_cm33_core1.h88465 #define VBAT_OSCCFGA_INIT_TRIM_MASK (0xE00U) macro
88477 … (((uint32_t)(((uint32_t)(x)) << VBAT_OSCCFGA_INIT_TRIM_SHIFT)) & VBAT_OSCCFGA_INIT_TRIM_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h91131 #define VBAT_OSCCFGA_INIT_TRIM_MASK (0xE00U) macro
91143 … (((uint32_t)(((uint32_t)(x)) << VBAT_OSCCFGA_INIT_TRIM_SHIFT)) & VBAT_OSCCFGA_INIT_TRIM_MASK)
DMCXN947_cm33_core0.h91131 #define VBAT_OSCCFGA_INIT_TRIM_MASK (0xE00U) macro
91143 … (((uint32_t)(((uint32_t)(x)) << VBAT_OSCCFGA_INIT_TRIM_SHIFT)) & VBAT_OSCCFGA_INIT_TRIM_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h91131 #define VBAT_OSCCFGA_INIT_TRIM_MASK (0xE00U) macro
91143 … (((uint32_t)(((uint32_t)(x)) << VBAT_OSCCFGA_INIT_TRIM_SHIFT)) & VBAT_OSCCFGA_INIT_TRIM_MASK)
DMCXN946_cm33_core1.h91131 #define VBAT_OSCCFGA_INIT_TRIM_MASK (0xE00U) macro
91143 … (((uint32_t)(((uint32_t)(x)) << VBAT_OSCCFGA_INIT_TRIM_SHIFT)) & VBAT_OSCCFGA_INIT_TRIM_MASK)