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Searched refs:USBHS_GPTIMER1CTRL_GPTCNT_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h62261 #define USBHS_GPTIMER1CTRL_GPTCNT_MASK (0xFFFFFFU) macro
62264 …(((uint32_t)(((uint32_t)(x)) << USBHS_GPTIMER1CTRL_GPTCNT_SHIFT)) & USBHS_GPTIMER1CTRL_GPTCNT_MASK)
63451 #define USBHS_GPTIMER1CTL_GPTCNT_MASK USBHS_GPTIMER1CTRL_GPTCNT_MASK
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h62219 #define USBHS_GPTIMER1CTRL_GPTCNT_MASK (0xFFFFFFU) macro
62222 …(((uint32_t)(((uint32_t)(x)) << USBHS_GPTIMER1CTRL_GPTCNT_SHIFT)) & USBHS_GPTIMER1CTRL_GPTCNT_MASK)
63409 #define USBHS_GPTIMER1CTL_GPTCNT_MASK USBHS_GPTIMER1CTRL_GPTCNT_MASK
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h81123 #define USBHS_GPTIMER1CTRL_GPTCNT_MASK (0xFFFFFFU) macro
81126 …(((uint32_t)(((uint32_t)(x)) << USBHS_GPTIMER1CTRL_GPTCNT_SHIFT)) & USBHS_GPTIMER1CTRL_GPTCNT_MASK)
82313 #define USBHS_GPTIMER1CTL_GPTCNT_MASK USBHS_GPTIMER1CTRL_GPTCNT_MASK
DMCXN546_cm33_core1.h81123 #define USBHS_GPTIMER1CTRL_GPTCNT_MASK (0xFFFFFFU) macro
81126 …(((uint32_t)(((uint32_t)(x)) << USBHS_GPTIMER1CTRL_GPTCNT_SHIFT)) & USBHS_GPTIMER1CTRL_GPTCNT_MASK)
82313 #define USBHS_GPTIMER1CTL_GPTCNT_MASK USBHS_GPTIMER1CTRL_GPTCNT_MASK
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h81123 #define USBHS_GPTIMER1CTRL_GPTCNT_MASK (0xFFFFFFU) macro
81126 …(((uint32_t)(((uint32_t)(x)) << USBHS_GPTIMER1CTRL_GPTCNT_SHIFT)) & USBHS_GPTIMER1CTRL_GPTCNT_MASK)
82313 #define USBHS_GPTIMER1CTL_GPTCNT_MASK USBHS_GPTIMER1CTRL_GPTCNT_MASK
DMCXN547_cm33_core1.h81123 #define USBHS_GPTIMER1CTRL_GPTCNT_MASK (0xFFFFFFU) macro
81126 …(((uint32_t)(((uint32_t)(x)) << USBHS_GPTIMER1CTRL_GPTCNT_SHIFT)) & USBHS_GPTIMER1CTRL_GPTCNT_MASK)
82313 #define USBHS_GPTIMER1CTL_GPTCNT_MASK USBHS_GPTIMER1CTRL_GPTCNT_MASK
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h83789 #define USBHS_GPTIMER1CTRL_GPTCNT_MASK (0xFFFFFFU) macro
83792 …(((uint32_t)(((uint32_t)(x)) << USBHS_GPTIMER1CTRL_GPTCNT_SHIFT)) & USBHS_GPTIMER1CTRL_GPTCNT_MASK)
84979 #define USBHS_GPTIMER1CTL_GPTCNT_MASK USBHS_GPTIMER1CTRL_GPTCNT_MASK
DMCXN947_cm33_core0.h83789 #define USBHS_GPTIMER1CTRL_GPTCNT_MASK (0xFFFFFFU) macro
83792 …(((uint32_t)(((uint32_t)(x)) << USBHS_GPTIMER1CTRL_GPTCNT_SHIFT)) & USBHS_GPTIMER1CTRL_GPTCNT_MASK)
84979 #define USBHS_GPTIMER1CTL_GPTCNT_MASK USBHS_GPTIMER1CTRL_GPTCNT_MASK
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h83789 #define USBHS_GPTIMER1CTRL_GPTCNT_MASK (0xFFFFFFU) macro
83792 …(((uint32_t)(((uint32_t)(x)) << USBHS_GPTIMER1CTRL_GPTCNT_SHIFT)) & USBHS_GPTIMER1CTRL_GPTCNT_MASK)
84979 #define USBHS_GPTIMER1CTL_GPTCNT_MASK USBHS_GPTIMER1CTRL_GPTCNT_MASK
DMCXN946_cm33_core1.h83789 #define USBHS_GPTIMER1CTRL_GPTCNT_MASK (0xFFFFFFU) macro
83792 …(((uint32_t)(((uint32_t)(x)) << USBHS_GPTIMER1CTRL_GPTCNT_SHIFT)) & USBHS_GPTIMER1CTRL_GPTCNT_MASK)
84979 #define USBHS_GPTIMER1CTL_GPTCNT_MASK USBHS_GPTIMER1CTRL_GPTCNT_MASK