Searched refs:UPLLCSR (Results 1 – 16 of 16) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/drivers/ |
| D | fsl_clock.c | 468 uint32_t reg = SCG0->UPLLCSR; in CLOCK_SetUpllMonitorMode()
474 SCG0->UPLLCSR = reg; in CLOCK_SetUpllMonitorMode()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/drivers/ |
| D | fsl_clock.c | 468 uint32_t reg = SCG0->UPLLCSR; in CLOCK_SetUpllMonitorMode()
474 SCG0->UPLLCSR = reg; in CLOCK_SetUpllMonitorMode()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/drivers/ |
| D | fsl_clock.c | 484 uint32_t reg = SCG0->UPLLCSR; in CLOCK_SetUpllMonitorMode()
490 SCG0->UPLLCSR = reg; in CLOCK_SetUpllMonitorMode()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/drivers/ |
| D | fsl_clock.c | 484 uint32_t reg = SCG0->UPLLCSR; in CLOCK_SetUpllMonitorMode()
490 SCG0->UPLLCSR = reg; in CLOCK_SetUpllMonitorMode()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/drivers/ |
| D | fsl_clock.c | 484 uint32_t reg = SCG0->UPLLCSR; in CLOCK_SetUpllMonitorMode()
490 SCG0->UPLLCSR = reg; in CLOCK_SetUpllMonitorMode()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/drivers/ |
| D | fsl_clock.c | 484 uint32_t reg = SCG0->UPLLCSR; in CLOCK_SetUpllMonitorMode()
490 SCG0->UPLLCSR = reg; in CLOCK_SetUpllMonitorMode()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/ |
| D | MCXN236.h | 52443 …__IO uint32_t UPLLCSR; /**< UPLL Control Status Register, offset: 0x700 … member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/ |
| D | MCXN235.h | 52401 …__IO uint32_t UPLLCSR; /**< UPLL Control Status Register, offset: 0x700 … member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/ |
| D | MCXN546_cm33_core0.h | 64022 …__IO uint32_t UPLLCSR; /**< UPLL Control Status Register, offset: 0x700 … member
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| D | MCXN546_cm33_core1.h | 64022 …__IO uint32_t UPLLCSR; /**< UPLL Control Status Register, offset: 0x700 … member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/ |
| D | MCXN547_cm33_core0.h | 64022 …__IO uint32_t UPLLCSR; /**< UPLL Control Status Register, offset: 0x700 … member
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| D | MCXN547_cm33_core1.h | 64022 …__IO uint32_t UPLLCSR; /**< UPLL Control Status Register, offset: 0x700 … member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/ |
| D | MCXN947_cm33_core1.h | 64769 …__IO uint32_t UPLLCSR; /**< UPLL Control Status Register, offset: 0x700 … member
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| D | MCXN947_cm33_core0.h | 64769 …__IO uint32_t UPLLCSR; /**< UPLL Control Status Register, offset: 0x700 … member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/ |
| D | MCXN946_cm33_core0.h | 64769 …__IO uint32_t UPLLCSR; /**< UPLL Control Status Register, offset: 0x700 … member
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| D | MCXN946_cm33_core1.h | 64769 …__IO uint32_t UPLLCSR; /**< UPLL Control Status Register, offset: 0x700 … member
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