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Searched refs:TRNGFCLKSEL_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_clock.h851 #define TRNGFCLKSEL_OFFSET 0xAC0 macro
1264 …CLKCTL0_TUPLE_MUXA(TRNGFCLKSEL_OFFSET, 0), /*!< Attach Compute base clock to TRNG Functional Clock…
1266 …CLKCTL0_TUPLE_MUXA(TRNGFCLKSEL_OFFSET, 1), /*!< Attach FRO1_DIV2 clock to TRNG Functional Clock. */
1268 …CLKCTL0_TUPLE_MUXA(TRNGFCLKSEL_OFFSET, 2), /*!< Attach FRO1_DIV8 clock to TRNG Functional Clock. */
1270 …CLKCTL0_TUPLE_MUXA(TRNGFCLKSEL_OFFSET, 3), /*!< Attach FRO1_DIV3 clock to TRNG Functional Clock. */
1271 …kNONE_to_TRNG = CLKCTL0_TUPLE_MUXA_NONE(TRNGFCLKSEL_OFFSET, 0), /*!< Attach NONE to TRNG Functiona…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_clock.h851 #define TRNGFCLKSEL_OFFSET 0xAC0 macro
1264 …CLKCTL0_TUPLE_MUXA(TRNGFCLKSEL_OFFSET, 0), /*!< Attach Compute base clock to TRNG Functional Clock…
1266 …CLKCTL0_TUPLE_MUXA(TRNGFCLKSEL_OFFSET, 1), /*!< Attach FRO1_DIV2 clock to TRNG Functional Clock. */
1268 …CLKCTL0_TUPLE_MUXA(TRNGFCLKSEL_OFFSET, 2), /*!< Attach FRO1_DIV8 clock to TRNG Functional Clock. */
1270 …CLKCTL0_TUPLE_MUXA(TRNGFCLKSEL_OFFSET, 3), /*!< Attach FRO1_DIV3 clock to TRNG Functional Clock. */
1271 …kNONE_to_TRNG = CLKCTL0_TUPLE_MUXA_NONE(TRNGFCLKSEL_OFFSET, 0), /*!< Attach NONE to TRNG Functiona…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_clock.h851 #define TRNGFCLKSEL_OFFSET 0xAC0 macro
1264 …CLKCTL0_TUPLE_MUXA(TRNGFCLKSEL_OFFSET, 0), /*!< Attach Compute base clock to TRNG Functional Clock…
1266 …CLKCTL0_TUPLE_MUXA(TRNGFCLKSEL_OFFSET, 1), /*!< Attach FRO1_DIV2 clock to TRNG Functional Clock. */
1268 …CLKCTL0_TUPLE_MUXA(TRNGFCLKSEL_OFFSET, 2), /*!< Attach FRO1_DIV8 clock to TRNG Functional Clock. */
1270 …CLKCTL0_TUPLE_MUXA(TRNGFCLKSEL_OFFSET, 3), /*!< Attach FRO1_DIV3 clock to TRNG Functional Clock. */
1271 …kNONE_to_TRNG = CLKCTL0_TUPLE_MUXA_NONE(TRNGFCLKSEL_OFFSET, 0), /*!< Attach NONE to TRNG Functiona…