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Searched refs:TDET0_BASE (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h12106 #define TDET0_BASE (0x50058000u) macro
12110 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
12114 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
12123 #define TDET0_BASE (0x40058000u) macro
12125 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
12127 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h12076 #define TDET0_BASE (0x50058000u) macro
12080 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
12084 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
12093 #define TDET0_BASE (0x40058000u) macro
12095 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
12097 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h14390 #define TDET0_BASE (0x50058000u) macro
14394 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
14398 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
14407 #define TDET0_BASE (0x40058000u) macro
14409 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
14411 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
DMCXN546_cm33_core1.h14390 #define TDET0_BASE (0x50058000u) macro
14394 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
14398 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
14407 #define TDET0_BASE (0x40058000u) macro
14409 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
14411 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h14390 #define TDET0_BASE (0x50058000u) macro
14394 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
14398 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
14407 #define TDET0_BASE (0x40058000u) macro
14409 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
14411 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
DMCXN547_cm33_core1.h14390 #define TDET0_BASE (0x50058000u) macro
14394 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
14398 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
14407 #define TDET0_BASE (0x40058000u) macro
14409 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
14411 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h14436 #define TDET0_BASE (0x50058000u) macro
14440 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
14444 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
14453 #define TDET0_BASE (0x40058000u) macro
14455 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
14457 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
DMCXN947_cm33_core0.h14436 #define TDET0_BASE (0x50058000u) macro
14440 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
14444 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
14453 #define TDET0_BASE (0x40058000u) macro
14455 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
14457 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h14436 #define TDET0_BASE (0x50058000u) macro
14440 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
14444 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
14453 #define TDET0_BASE (0x40058000u) macro
14455 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
14457 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
DMCXN946_cm33_core1.h14436 #define TDET0_BASE (0x50058000u) macro
14440 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
14444 #define DIGTMP_BASE_ADDRS { TDET0_BASE }
14453 #define TDET0_BASE (0x40058000u) macro
14455 #define TDET0 ((DIGTMP_Type *)TDET0_BASE)
14457 #define DIGTMP_BASE_ADDRS { TDET0_BASE }