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Searched refs:SYS_PLL2_PFD (Results 1 – 25 of 29) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/drivers/
Dfsl_clock.c272 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_InitSysPll2()
320 ANADIG_PLL->SYS_PLL2_PFD &= in CLOCK_InitSysPll2()
327 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_DeinitSysPll2()
349 return ((ANADIG_PLL->SYS_PLL2_PFD & (uint32_t)ANADIG_PLL_SYS_PLL2_PFD_PFD0_DIV1_CLKGATE_MASK in CLOCK_IsSysPll2PfdEnabled()
367 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_InitPfd()
419 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_DeinitPfd()
448 frac = (ANADIG_PLL->SYS_PLL2_PFD & in CLOCK_GetPfdFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/drivers/
Dfsl_clock.c272 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_InitSysPll2()
320 ANADIG_PLL->SYS_PLL2_PFD &= in CLOCK_InitSysPll2()
327 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_DeinitSysPll2()
349 return ((ANADIG_PLL->SYS_PLL2_PFD & (uint32_t)ANADIG_PLL_SYS_PLL2_PFD_PFD0_DIV1_CLKGATE_MASK in CLOCK_IsSysPll2PfdEnabled()
367 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_InitPfd()
419 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_DeinitPfd()
448 frac = (ANADIG_PLL->SYS_PLL2_PFD & in CLOCK_GetPfdFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/drivers/
Dfsl_clock.c272 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_InitSysPll2()
320 ANADIG_PLL->SYS_PLL2_PFD &= in CLOCK_InitSysPll2()
327 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_DeinitSysPll2()
349 return ((ANADIG_PLL->SYS_PLL2_PFD & (uint32_t)ANADIG_PLL_SYS_PLL2_PFD_PFD0_DIV1_CLKGATE_MASK in CLOCK_IsSysPll2PfdEnabled()
367 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_InitPfd()
419 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_DeinitPfd()
448 frac = (ANADIG_PLL->SYS_PLL2_PFD & in CLOCK_GetPfdFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/drivers/
Dfsl_clock.c272 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_InitSysPll2()
320 ANADIG_PLL->SYS_PLL2_PFD &= in CLOCK_InitSysPll2()
327 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_DeinitSysPll2()
349 return ((ANADIG_PLL->SYS_PLL2_PFD & (uint32_t)ANADIG_PLL_SYS_PLL2_PFD_PFD0_DIV1_CLKGATE_MASK in CLOCK_IsSysPll2PfdEnabled()
367 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_InitPfd()
419 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_DeinitPfd()
448 frac = (ANADIG_PLL->SYS_PLL2_PFD & in CLOCK_GetPfdFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_clock.c308 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_InitSysPll2()
358 ANADIG_PLL->SYS_PLL2_PFD &= in CLOCK_InitSysPll2()
365 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_DeinitSysPll2()
387 return ((ANADIG_PLL->SYS_PLL2_PFD & (uint32_t)ANADIG_PLL_SYS_PLL2_PFD_PFD0_DIV1_CLKGATE_MASK in CLOCK_IsSysPll2PfdEnabled()
405 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_InitPfd()
456 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_DeinitPfd()
485 frac = (ANADIG_PLL->SYS_PLL2_PFD & in CLOCK_GetPfdFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_clock.c308 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_InitSysPll2()
358 ANADIG_PLL->SYS_PLL2_PFD &= in CLOCK_InitSysPll2()
365 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_DeinitSysPll2()
387 return ((ANADIG_PLL->SYS_PLL2_PFD & (uint32_t)ANADIG_PLL_SYS_PLL2_PFD_PFD0_DIV1_CLKGATE_MASK in CLOCK_IsSysPll2PfdEnabled()
405 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_InitPfd()
456 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_DeinitPfd()
485 frac = (ANADIG_PLL->SYS_PLL2_PFD & in CLOCK_GetPfdFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_clock.c308 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_InitSysPll2()
356 ANADIG_PLL->SYS_PLL2_PFD &= in CLOCK_InitSysPll2()
363 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_DeinitSysPll2()
385 return ((ANADIG_PLL->SYS_PLL2_PFD & (uint32_t)ANADIG_PLL_SYS_PLL2_PFD_PFD0_DIV1_CLKGATE_MASK in CLOCK_IsSysPll2PfdEnabled()
403 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_InitPfd()
455 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_DeinitPfd()
484 frac = (ANADIG_PLL->SYS_PLL2_PFD & in CLOCK_GetPfdFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_clock.c308 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_InitSysPll2()
358 ANADIG_PLL->SYS_PLL2_PFD &= in CLOCK_InitSysPll2()
365 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_DeinitSysPll2()
387 return ((ANADIG_PLL->SYS_PLL2_PFD & (uint32_t)ANADIG_PLL_SYS_PLL2_PFD_PFD0_DIV1_CLKGATE_MASK in CLOCK_IsSysPll2PfdEnabled()
405 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_InitPfd()
456 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_DeinitPfd()
485 frac = (ANADIG_PLL->SYS_PLL2_PFD & in CLOCK_GetPfdFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_clock.c308 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_InitSysPll2()
358 ANADIG_PLL->SYS_PLL2_PFD &= in CLOCK_InitSysPll2()
365 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_DeinitSysPll2()
387 return ((ANADIG_PLL->SYS_PLL2_PFD & (uint32_t)ANADIG_PLL_SYS_PLL2_PFD_PFD0_DIV1_CLKGATE_MASK in CLOCK_IsSysPll2PfdEnabled()
405 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_InitPfd()
456 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_DeinitPfd()
485 frac = (ANADIG_PLL->SYS_PLL2_PFD & in CLOCK_GetPfdFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_clock.c308 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_InitSysPll2()
358 ANADIG_PLL->SYS_PLL2_PFD &= in CLOCK_InitSysPll2()
365 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_DeinitSysPll2()
387 return ((ANADIG_PLL->SYS_PLL2_PFD & (uint32_t)ANADIG_PLL_SYS_PLL2_PFD_PFD0_DIV1_CLKGATE_MASK in CLOCK_IsSysPll2PfdEnabled()
405 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_InitPfd()
456 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_DeinitPfd()
485 frac = (ANADIG_PLL->SYS_PLL2_PFD & in CLOCK_GetPfdFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_clock.c308 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_InitSysPll2()
356 ANADIG_PLL->SYS_PLL2_PFD &= in CLOCK_InitSysPll2()
363 ANADIG_PLL->SYS_PLL2_PFD |= in CLOCK_DeinitSysPll2()
385 return ((ANADIG_PLL->SYS_PLL2_PFD & (uint32_t)ANADIG_PLL_SYS_PLL2_PFD_PFD0_DIV1_CLKGATE_MASK in CLOCK_IsSysPll2PfdEnabled()
403 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_InitPfd()
455 pfdCtrl = &ANADIG_PLL->SYS_PLL2_PFD; in CLOCK_DeinitPfd()
484 frac = (ANADIG_PLL->SYS_PLL2_PFD & in CLOCK_GetPfdFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h5180 __IO uint32_t SYS_PLL2_PFD; /**< SYS_PLL2_PFD_REGISTER, offset: 0x270 */ member
DMIMXRT1175_cm7.h5183 __IO uint32_t SYS_PLL2_PFD; /**< SYS_PLL2_PFD_REGISTER, offset: 0x270 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h5174 __IO uint32_t SYS_PLL2_PFD; /**< SYS_PLL2_PFD_REGISTER, offset: 0x270 */ member
DMIMXRT1165_cm4.h5171 __IO uint32_t SYS_PLL2_PFD; /**< SYS_PLL2_PFD_REGISTER, offset: 0x270 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h5183 __IO uint32_t SYS_PLL2_PFD; /**< SYS_PLL2_PFD_REGISTER, offset: 0x270 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h5186 __IO uint32_t SYS_PLL2_PFD; /**< SYS_PLL2_PFD_REGISTER, offset: 0x270 */ member
DMIMXRT1166_cm7.h5189 __IO uint32_t SYS_PLL2_PFD; /**< SYS_PLL2_PFD_REGISTER, offset: 0x270 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h5192 __IO uint32_t SYS_PLL2_PFD; /**< SYS_PLL2_PFD_REGISTER, offset: 0x270 */ member
DMIMXRT1173_cm7.h5195 __IO uint32_t SYS_PLL2_PFD; /**< SYS_PLL2_PFD_REGISTER, offset: 0x270 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h5198 __IO uint32_t SYS_PLL2_PFD; /**< SYS_PLL2_PFD_REGISTER, offset: 0x270 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h5200 __IO uint32_t SYS_PLL2_PFD; /**< SYS_PLL2_PFD_REGISTER, offset: 0x270 */ member
DMIMXRT1176_cm4.h5197 __IO uint32_t SYS_PLL2_PFD; /**< SYS_PLL2_PFD_REGISTER, offset: 0x270 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/
DMIMXRT1182.h3986 __IO uint32_t SYS_PLL2_PFD; /**< SYS_PLL2_PFD_REGISTER, offset: 0x4070 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/
DMIMXRT1181.h3986 __IO uint32_t SYS_PLL2_PFD; /**< SYS_PLL2_PFD_REGISTER, offset: 0x4070 */ member

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